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5 Jul 2014

Lat

Michael Dunn @ edn.com writes:

Whether engineer, hobbyist, or maker, we’ve happily watched as chipmakers and third parties alike have come to their senses in recent years and cooked up a smorgasbord (smorgasboard?) of low-cost microcontroller devboards – in some cases, very low cost, like TI’s $4.30 MSP430 board. More recently, we’ve seen ARM Cortex kits for $10-$50, the flowering of the whole Arduino ecosystem, and of course, the Raspberry Pi, starting at $25. It’s microcontroller heaven.

Those of us wanting a cheap “in” to the FPGA world have been less lucky. But the times, they are a changin’. Many FPGA devkits, from both chipmakers and third parties, have broken – or downright shattered – the $100 barrier, opening the door to low-cost FPGA prototyping, education, hobby projects, and so on.

Follow me as I explore this brave new world of affordable FPGA learning and design. I’ve acquired a representative selection of bargain-priced boards, and will be reviewing each, not just on paper, but by actually creating projects with it.

FPGA boards under $100: Introduction - [Link]

27 Jun 2014

pyroelectro.com just started an online course, An Introduction To FPGA And CPLD, through uReddit.com.

This course is meant to create a pathway into learning about FPGA and CPLD electronics, for people who are scared of the code, tools and general trickery that usually comes with it. A hands-on approach is taken in this course through a combination of lecture and experimentation to teach you about the different features of both the development tools and languages used in the world of FPGA. Additionally, visuals are used throughout lectures like step-by-step schematic building and line-by-line code explanations so that everything gets explained.

An Introduction To FPGA And CPLD - [Link]

30 May 2014

Comes with all the hardware and software you need to quickly get your FPGA project going. Now you can focus on the real engineering.

When we came up with our board’s design, we looked at what was available in other boards on the market and enhanced it.

Our kit is small, much smaller than the closest thing on the market,it’s smaller than a credit card at only 1.8 in x 3.0 in. That means you can put it inside some pretty small projects. (Here’s something to get you thinking, by 2025 the cost of putting one pound into space is expected to be just $100.)

And our kit is bread board friendly, so you can quickly connect it to a shield or to a bread board.

Now, there’s a handful of other broads with many of these features on the market, but our miniSpartan6+ costs around half of what its closest competitor does.

miniSpartan6+ : A Powerful FPGA Board and Easy to Use IDE - [Link]

10 May 2014

Detailed look at methods for driving LED matrix displays, including simple LED displays and full-colour video screen modules.

Driving LED matrix displays with an FPGA - [Link]


26 Apr 2014

ALT037

The hardened single-precision floating point DSP blocks included in Arria 10 and Stratix 10 devices are based on Altera’s variable precision DSP architecture. Unlike traditional approaches that implement floating point by using fixed point multipliers and FPGA logic, the hardened floating point DSP blocks eliminate nearly all the logic usage required for existing FPGA floating-point computations. The technology enables Altera to deliver up to 1.5 TeraFLOPs DSP performance in Arria 10 devices and up to 10 TeraFLOPs DSP performance in Stratix 10 devices. This now gives DSP designers the choice of either fixed or floating-point modes. The floating point blocks are backwards compatible with existing designs.

Altera adds Floating Point feature to Gate Arrays - [Link]

17 Mar 2014

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A XC6SLX9 based design with a soft CPU and USB device interface implemented in Verilog.

This features my AltOR32 OpenRISC compatible CPU running at 48MHz which hosts a cutdown USB 1.1 (Full Speed) device, SPI master and GPIO interfaces.

The nice thing about this implementation is the low chip count (only required components are the FPGA, LDOs, SPI Flash & USB PHY).

Also, as the USB 1.1 device is implemented in the FPGA rather than an external USB to serial bridge, I’m free to implement other USB class devices (such as Audio, MSD, etc).

Currently comes with USB CDC device stack (virtual COM port). RTL, SW & schematics provided.

FPGA Based ‘Bus Pirate’ clone - [Link]

1 Mar 2014

The ring counter is useful in hardware logic design such as Application-Specific Integrated Circuit (ASIC) and Field-Programmable Gate Array (FPGA). The ring counter is also ideal in creating simple finite state machines.

The diagram is a circuit of a 4-bit twisted ring counter which can function in 4 different modes, namely: Serial-Input-Serial-Output (SISO), Serial-Input-Parallel-Output (SIPO), Parallel-Input-Serial-Output (PISO), and Parallel-Input-Parallel-Output, by applying Qo to the serial input, the resulting circuit will be a twisted ring or a Johnson Counter.  Twisted ring counters are shift registers where the output from the last flip-flop becomes the input of the first flip-flop; it will result in a closed loop circuit which recirculates the data bits around a continuous loop for every sequence state.

The circuit is composed of NAND gates, flip-flops, voltage sources, and clocking system. The NAND gates are incorporated in a Quad-2 input NAND Gate integrated circuit with part number 74ABT00D. The NAND gates receive the inputs from D0, D1, D2, and D3. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. The circuit also uses JK flip flops as the memory element. For this circuit, the dual JK flip-flop IC with part number 74HC109D is used. Two 74HC109D chips are used since the circuit needs four JK flip-flops and each IC has two JK flip-flops in it. The 74HC109 is a dual positive-edge triggered, JK flip-flops with individual J, K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs; also complementary Q and Q outputs.  The set and reset are asynchronous active LOW inputs and operate independently of the clock input.  The supply voltages used to power the ICs are set at 5V for 74ABT00D IC and -1.5V for the 74ABT00D IC. The clocking system connected to the flip-flops provide synchronization pulses and timing for the circuit.

Components:

  • 74ABT00D Quad-2 input NAND Gate
  • 74HC109D Dual Positive-edge triggered JK flip-flops
  • Clocking system
  • +5V DC Voltage Source
  • -1.5V DC Voltage Source

4-bit Twisted Ring Counter using JK Flip Flops – [Link]

10 Jan 2014

6867bfae7251737b176e88d806b25258_large

DSLogic is an interesting open source 200MHz logic analyzer project on Kickstarter.

Most of electronic instruments are designed in professional fashion. They are dedicated, traditional, well functioned, and most importantly, expensive. They are usually only available and affordable to academic and industry. Individuals, however, are not lucky enough to get the best electronic instruments as they want. This is how we are inspired to make DSLogic. [...]

DSLogic consists of DSLogic-Core and extension modules. DSLogic-Core is a re-configurable circuit board based on FPGA technology with maximum 200MHz sampling rate and 64Mbit on-board memory. DSLogic-Core can work alone as a fully functional logic analyzer, along with various extension modules. DSLogic can also work as oscilloscope, data acquisition system, protocol analyzer and even RF analyzer.

DSLogic – Multifunction Instruments For Everyone - [Link]

26 Nov 2013

Terasic’s DE0-Nano houses the Altera Cyclone IV that features a low cost, low power FPGA ideal for high-volume and cost-sensitive applications. Boosting a miniature size of 49 x 75 mm and a weight of 40 g, the board was aimed for simple implementations targeting the Cyclone IV up to 22,320 LEs. The device utilizes small spacers as legs and even an acrylic cover on top of the board to provide better protection making this Development kit (Devkit) the option to choose for robust applications while giving of a sleek feel to users as they get to look through the device’s glass-like cover. The DE0-Nano definitely is one device to consider in making portable design projects where portable power is essential.

Running at around $80, users already get to enjoy a lot of other on board features. The DE0-Nano is equipped with a 3-axis digital accelerometer designed for better sensing applications. Other on board features follow in the form of 2 separate extension headers plus a third header that supports an ADC converter with 8-channels and 16 I/O Pins, 8 user LEDs, Push buttons and DIP switches. DE0-Nano also provides a three-power scheme option for designers through a USB mini-AB port, 2-pin external power header and two DC 5V pins.

Upon connection to the host PC, the FPGA Devkit automatically powers up and the LEDs start fading in and out. Once host PC has loaded up the DE0-Nano Control Panel, the LEDs stop fading indicating a full user access of the device. The DE0-Nano Control Panel is a GUI that allows users to automatically verify hardware components of the board. Users get to play around the LEDs and a GUI representation is also provided for the Push buttons and DIP switches. The control panel also allows users to work around with the memory and verify accelerometer coordinates and even provides an ADC tab that allows users to monitor the voltage levels in the different channels. The DE0-Nano Control Panel has a user-friendly interface that provides a fast response GUI that readily illustrates all changes made in the actual board. In general, the device is a great development board. It already has everything on board without having to pay for a lot of extras. Despite the DE0-Nano being an entry-level device, the well thought out and compact design definitely makes it a very complete and functional development board.

Terasic DE0 Nano – Product Overview - [Link]

22 Aug 2013

icestick-reva-front-2400-600x172

Lattice Semi has released their iCEstick eval board. This board has a high-performance, low-power iCE40HX1K FPGA on board and has a USB thumb drive form factor. IO connectors include 16 LVCMOS/LVTTL (3.3 V) digital I/O connections on 0.1” through-hole connections and a 2 x 6 position Digilent Pmod connector for other peripheral connections. The board’s FTDI 2232H USB device allows iCE device programming and UART interface to a PC. On board devices include a Vishay TFDU4101 IrDA transceiver and five user LEDs. The board also includes a Discera 12 Mhz MEMS oscillator, Micron 32 Mbit N25Q32 SPI flash and is powered directly from the USB connector. [via]

Lattice debuts iCEstick FPGA Evaluation Board at $24.99 - [Link]



 
 
 

 

 

 

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