Tag Archives: memory

DS28EC20, A Serial 1-Wire 20Kb EEPROM

The American manufacturer of analog and mixed-signal integrated circuits, Maxim Integrated, has developed a new serial EEPROM memory that operates from single-contact 1-wire interface.

The DS28EC20 is a 20480-bit, 1-Wire® EEPROM organized as 80 memory pages of 256 bits each. An additional page is set aside for control functions. Data is written to a 32-byte scratchpad, verified, and then copied to the EEPROM memory.

The 1-Wire is a device communications bus system that provides low-speed data, signaling, and power over a single conductor. This technology uses only two wires; data and ground. It is similar in concept to I²C, but with lower data rates and longer range. It is typically used to communicate with small inexpensive devices such as digital thermometers and weather instruments.

DS28EC20 features:
  • 20480 Bits of Nonvolatile (NV) EEPROM Partitioned into Eighty 256-Bit Pages
  • Individual 8-Page Groups of Memory Pages (Blocks) can be Permanently Write Protected or Put in OTP EPROM-Emulation Mode (“Write to 0”)
  • Read and Write Access Highly Backward-Compatible to Legacy Devices (e.g., DS2433)
  • 256-Bit Scratchpad with Strict Read/Write Protocols Ensures Integrity of Data Transfer
  • 200k Write/Erase Cycle Endurance at +25°C
  • Unique Factory-Programmed 64-Bit Registration Number Ensures Error-Free Device Selection and Absolute Part Identity
  • Switchpoint Hysteresis and Filtering to Optimize Performance in the Presence of Noise
  • Communicates to Host at 15.4kbps or 90kbps Using 1-Wire Protocol
  • Low-Cost TO-92 Package
  • Operating Range: 5V ±5%, -40°C to +85°C
  • IEC 1000-4-2 Level 4 ESD Protection (8kV Contact, 15kV Air, Typical) for I/O Pin

Blocks of eight memory pages can be write-protected or put in EPROM-Emulation mode, where bits can only be changed from a 1 to a 0 state. The life-expectancy of the DS28EC20 is specified at more that 200 k erase/write cycles at 25 °C. The I/O pin has IEC 1000-4-2 Level 4 ESD protections (8 kV contact, 15 kV air).

Applications that can use the DS28EC20:
  • Card/Module Identification in Rack-Based Systems
  • Device Authentication
  • IEEE 1451.4 Sensors
  • Ink and Toner Cartridge ID
  • Medical and Industrial Sensor Identification/Calibration
  • PCB Identification
  • Smart Cable

Ordering DS28EC20 is available for about $1.7 per chip through Maxim website. You can also get design resources and technical documents of the chip.

The New Fujitsu ReRam

Resistive random-access memory (RRAM or ReRAM) is a type of non-volatile (NV) random-access (RAM) computer memory that works by changing the resistance across a dielectric solid-state material often referred to as a memristor.

Fujitsu Semiconductor has just launched world’s largest density 4 Mbit ReRAM product for mass production: MB85AS4MT. Partnering with Panasonic Semiconductor Solutions, this chip came to life.

The MB85AS4MT is an SPI-interface ReRAM product that operates with a wide range of power supply voltage, from 1.65V to 3.6V. It features an extremely small average current in read operations of 0.2mA at a maximum operating frequency of 5MHz.

It is optimal for battery operated wearable devices and medical devices such as hearing aids, which require high density, low power consumption electronic components.

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Main Specifications
  • Memory Density (configuration): 4 Mbit (512K words x 8 bits)
  • Interface: Serial peripheral interface (SPI)
  • Operating power supply voltage: 1.65V – 3.6V
  • Low power consumption:
    • Read operating current: 0.2mA (at 5MHz)
    • Write operating current: 1.3mA (during write cycle time)
    • Standby current: 10µA
    • Sleep current: 2µA
  • Guaranteed write cycles: 1.2 million cycles
  • Guaranteed read cycles: Unlimited
  • Write cycle time (256 byte page): 16ms (with 100% data inversion)
  • Data retention: 10 years (up to 85°C)
  • Package: 209 mil 8-pin SOP

This figure shows the block diagram of the chip:

reram

MB85AS4MT is suitable for lots of applications like medical devices, and IoT devices such as meters and sensors. In addition, the chip has the industry’s lowest power consumption for read operations in non-volatile memory.

For more information about MB85AS4MT, you can check the datasheet and the official website.

ESP8266 16MB Flash Handling

wifi-serial-transceiver-module

Piers Finlayson shares his adventures in programming the ESP8266 to access 16MB flash:

To put this in context, the original ESP8266 modules (such as the ESP-01) offered 512KB of flash, with the more recent ones (ESP-07) 1MB and then 4MB. The maximum addressable flash memory of the ESP8266 is 16MB according to the datasheet. (The ESP32 offers up to 4 x 16MB of flash.)

I don’t have a particular need for > 4MB flash (otb-iot currently only requires and supports 4MB) but my interest was tweaked in the larger flash chips, so I thought I’d give it a go. I’ve experience of replacing flash chips from older modules to upgrade them from 1MB to 4MB, so figured 16MB would be the same.

ESP8266 16MB Flash Handling – [Link]

Samsung and Toshiba Will Start 64-layer 3D NAND Production Soon

Toshiba will start mass production of 64-layer 3D NAND, BiCS3, with 3-bit-per-cell technology and a 64GB capacity in the first half of 2017. The applications of this new massive storage chip include enterprise and consumer SSD, smartphones, tablets and memory cards. This achievement succeeds the 48-layer BiCS FLASH one.

Western Digital, the well known industry-leading provider of storage technologies, recently announced world’s first 64 Layer 3D NAND. “BiCS3 has been developed jointly with Western Digital’s technology and manufacturing partner Toshiba. It will be initially deployed in 256 gigabit(32GB) capacity” according to Western Digital’s press release.

In the same context, Samsung seems going to start production of 64-layer 3D NAND at the end of this year 2016.

Toshiba-64-bit-layer

Via: electronicsweekly 1&2

Information storage at one atom per bit; a 1kB atomic memory

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A team of scientists at the Kavli Institute of Nanoscience at Delft University has achieved what may represent a limit in information storage density by creating a memory in which a single bit is represented by a single atom. By Graham Prophet @ edn-europe.com:

Specifically, the team created a 1 kByte memory array where each bit is represented by the (physical) position of one single chlorine atom. This equates to 500 Terabits per square inch (Tbpsi), 500 times better than the best commercial hard disk currently available. The team, led by the Institute’s Sander Otte, reported their work in Nature Nanotechnology on Monday July 18, 2016.

Memory upgrade for ESP8266

ESP-01-on-motherboard

Pete show us how to upgrade your ESP8266 with 32Mbit memory chip.

Some time ago I passed comment in here about converting an ESP-01 to 32Mb  (or 4MB).  And here it is in the flesh – a 32Mb ESP-01 – and also – at last – Sonoff Upgrades.

Now, why would you want to do all of that? I would suggest only if you happen to have lots of ESP-01 units lying around – and I’ll bet quiet a lot of you do. As for the Sonoffs – well, put it this way, I just ordered another 10 chips!

Memory upgrade for ESP8266 – [Link]

IBM scientists achieve storage memory breakthrough

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For the first time, scientists at IBM Research have demonstrated reliably storing 3 bits of data per cell using a relatively new memory technology known as phase-change memory (PCM).

The current memory landscape spans from venerable DRAM to hard disk drives to ubiquitous flash. But in the last several years PCM has attracted the industry’s attention as a potential universal memory technology based on its combination of read/write speed, endurance, non-volatility and density. For example, PCM doesn’t lose data when powered off, unlike DRAM, and the technology can endure at least 10 million write cycles, compared to an average flash USB stick, which tops out at 3,000 write cycles.

IBM scientists achieve storage memory breakthrough – [Link]

Current bending yields low-power magnetic memory

20160307102740_MRAM

by Harry Baggen @ elektormagazine.com:

Magnetic random-access memory (MRAM) is faster, more efficient and more robust than other data storage media. MRAM stores data by making clever use of electron spin – a sort of gyroscopic property of electrons. Because it used magnetism instead of stored charge, MRAM is nonvolatile, which means that the stored data can survive a power outage. MRAM also uses much less current. However, high peak currents are necessary to flip the electron spins in the right direction to store the data.

Current bending yields low-power magnetic memory – [Link]

Testing DRAM Using an Arduino

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Chris @ insentricity.com wanted to test a few dozen individual RAM chips so he decided to use Arduino to make his life a little bit easier. In the article he explains the interface with Arduino and gives the code on github.

My first thought was to test the chips in the TL866CS, but it doesn’t support them. What to do? Well why not build something with an Arduino to test the DRAM? I wasn’t sure how easy that would be since DRAM is trickier than SRAM because it requires a periodic refresh to keep the bits from fading.

Testing DRAM Using an Arduino – [Link]

RELATED POSTS

Samsung launches industry’s first 12Gb LPDDR4 DRAM

5-samsunglaunc

by Samsung:

Samsung Electronics announced that it is mass producing the industry’s first 12-gigabit (Gb) LPDDR4 (low power, double data rate 4) mobile DRAM, based on its advanced 20-nanometer (nm) process technology.

The newest LPDDR4 is expected to significantly accelerate the adoption of high capacity mobile DRAM worldwide. The 12Gb LPDDR4 brings the largest capacity and highest speed available for a DRAM chip, while offering excellent energy efficiency, reliability and ease of design – all essential to developing next-generation mobile devices.

Samsung launches industry’s first 12Gb LPDDR4 DRAM – [Link]