Tag Archives: Processor

Imec and Cadence Tape Out Industry’s First 3nm Processor Chip

Nanoelectronics research institute IMEC and Cadence Design Systems have worked together to produce a tape-out for the industry’s first 64bit processor core as a test chip to be built in a nominal 3nm node. The tape-out project, geared toward advancing 3nm chip design, was completed using extreme ultraviolet (EUV) and 193 immersion (193i) lithography-oriented design rules and Cadence tools.

Cadence and Imec have created and validated GDS files using a modified Cadence tool flow. It is based on a metal stack using a 21-nm routing pitch and a 42-nm contacted poly pitch created with data from a metal layer made in an earlier experiment. The Cadence tools used include the Innovus implementation system that makes use of massively parallel computation for the physical implementation system to achieve power, performance, and area (PPA) targets. The Genus synthesis tool provides RTL synthesis that addresses FinFET process node requirements.

IMEC utilized a standard industry’s 64-bit CPU for the design with a custom 3nm standard cell library. For the project, EUV and 193i lithography rules were tested to provide the required resolution, while providing PPA comparison under two different patterning assumptions.

Imec is starting work on the masks and lithography, initially aiming to use double-patterning EUV and self-aligned quadruple patterning (SAQP) immersion processes. Over time, Imec hopes to optimize the process to use a single pass in the EUV scanner. Ultimately, fabs may migrate to a planned high-numerical-aperture version of today’s EUV systems to make 3-nm chips.

Besides the finer features, the first two layers of 3-nm chips may use different metalization techniques and metals such as cobalt, said Ryoung-Han Kim, an R&D group manager at Imec. The node is also expected to use new transistor designs such as nanowires or nanosheets rather than the FinFETs utilized in today’s 16-nm and finer processes.

As process dimensions reduce to the 3nm node, interconnect variation becomes much more significant,” said An Steegen, executive vice president for semiconductor technology and systems at Imec. “Our work on the test chip has enabled interconnect variation to be measured and improved and the 3nm manufacturing process to be validated. Also, the Cadence digital solutions offered everything needed for this 3nm implementation. Due to Cadence’s well-integrated flow, the solutions were easy to use, which helped our engineering team stay productive when developing the 3nm rule set.

Imex and Cadence are achieving new milestones together with this new 3nm tape-out, which can transform the future of mobile designs at advanced nodes. For more information on EUV technology and 193i technology, see the article about it here.

Exynos 9 series applications processor has deep learning based software

The new Exynos 9810 brings premium features with a 2.9GHz custom CPU, an industry-first 6CA LTE modem and deep learning processing capabilities

Samsung Electronics, a world leader in advanced semiconductor technology, today announced the launch of its latest premium application processor (AP), the Exynos 9 Series 9810. The Exynos 9810, built on Samsung’s second-generation 10-nanometer (nm) FinFET process, brings the next level of performance to smartphones and smart devices with its powerful third-generation custom CPU, faster gigabit LTE modem and sophisticated image processing with deep learning-based software.

In recognition of its innovation and technological advancements, Samsung’s Exynos 9 Series 9810 has been selected as a CES 2018 Innovation Awards HONOREE in the Embedded Technologies product category and will be displayed at the event, which runs January 9-12, 2018, in Las Vegas, USA.

“The Exynos 9 Series 9810 is our most innovative mobile processor yet, with our third-generation custom CPU, ultra-fast gigabit LTE modem and, deep learning-enhanced image processing,” said Ben Hur, vice president of System LSI marketing at Samsung Electronics. “The Exynos 9810 will be a key catalyst for innovation in smart platforms such as smartphones and personal computing for the coming AI era.”

With the benefits of the industry’s most advanced 10nm process technology, the Exynos 9810 will enable seamless multi-tasking with faster loading and transition times between the latest mobile apps. The processor has a brand new eight-core CPU under its hood, four of which are powerful third-generation custom cores that can reach 2.9 gigahertz (GHz), with the other four optimized for efficiency. With an architecture that widens the pipeline and improves cache memory, single-core performance is enhanced two-fold and multi-core performance is increased by around 40 percent compared to its predecessor. (more…)

STMicroelectronics Introduces STM32WB – A SoC With 32bit Microcontroller And Bluetooth Low Energy 5

The new STM32WB from STMicroelectronics is a new wireless supporting System on a chip (SoC) that comes with a fully-featured ARM Cortex-M4 (@ 64 MHz) based microcontroller to run the main computing processes. It also has an ARM Cortex-M0+ core (@ 32 MHz) to offload the main processor and offer real-time operation on the Bluetooth Low Energy (BLE) 5 and IEEE 802.15.4 radio. The SoC can also run other wireless protocols as OpenThread, ZigBee® or other proprietary protocols. It opens many more options for connecting devices to the Internet of Things (IoT).

STM32WB High-performance SoC specifications
STM32WB High-performance SoC specifications

The Cortex-M4 combined with a Cortex-M0+ for network processing makes sure the STM32WB to be the latest ultra-low-power microcontroller to combine superior RF performance with longer battery life. The SoC also combines essential circuitry for connecting to the antenna. It also packs right amount user and system memory, hardware encryption, and customer-key storage for brand and IP protection.

These days, only a few manufacturers offer similar dual-processor wireless chips capable of managing the user application and the radio separately for maximum performance. Alternative chips typically utilize entry-level ARM Cortex-M industry-standard cores, which introduce technical limitations and very low amount of onboard flash memory.

The robust and low-power 2.4GHz radio consumes only 5.5mA in transmit mode of this new STM32WB and as little as 3.8mA when receiving. This device also include STM32 digital and analog peripherals that are engineered for low power consumption and complex functionalities, including timers, ultra-low-power comparators, 12/16-bit SAR ADC, a capacitive touch controller, LCD controller, and industry-standard connectivity including crystal-less USB 2.0 FS, I2C, SPI, SAI audio interface, and a Quad-SPI supporting execution in place.

STM32WB devices will be available in an array of 48-pin UQFN, 68-pin VQFN, or 100-pin WLCSP with up to 72 general-purpose I/Os (GPIO). Each can be specified with any of three memory configurations, giving a choice of 256KB Flash and 128KB RAM, 512KB-Flash/256KB-RAM, or 1MB-Flash/256KB-RAM.

More information is available at the official website.

TS-4100 – A i.MX6 UL (UltraLite) Bases Hybrid SBC With FPGA And Programmable ZPU Core

Technologic Systems has begun testing its first i.MX6 UL (UltraLite) based board, which is also its first computer-on-module that can work as a single board computer. The footprint of 75 x 55mm TS-4100 module features a microSD slot, onboard eMMC, a micro-USB OTG port with power support, and optional WiFi and Bluetooth. This board offers long-term support and a temperature operating range of -40 to 85°C, and ships with schematics and open source Linux images (Ubuntu 16.04 and Debian Jesse).

Technologic System's Hybrid SBC TS-4100 (front)
Technologic System’s Hybrid SBC TS-4100 (front)

This board contains a low-power (4k LUT) MachX02 FPGA from Lattice Semiconductor. Technologic has improved the FPGA with an open source, programmable ZPU soft core that provides support for offloading CPU tasks as well as harder real-time on I/O interactions. The 32-bit, stack-based ZPU architecture offers a full GCC tool suite. In this implementation, it’s imbued with 8K of BlockRAM, which can be accessed by the i.MX6 UL, and has full access to all FPGA I/O.

The low-power i.MX6 UL and its power management IC are utilized to provide an efficient 300mW typical power usage. The module is equipped with 512MB to 1GB DDR3. The specification list concludes only 4GB MLC eMMC or 2GB of “robust” SLC eMMC as options, but the block diagram suggests you can load up to 64GB eMMC.

The TS-4100 is equipped with a pair of 10/100 Ethernet controllers plus LCD and I2S interfaces for media connectivity. There are also several serial and USB interfaces along with the micro-USB OTG port. Other interfaces are listed as an accelerometer, gyro, SPI, I2C, and PWM and 2 separate CAN buses.

Key specifications for the TS-4100:

  • 512MB to 1GB DDR3 RAM
  • 4GB MLC eMMC or 2GB SLC eMMC (possibly up to 64GB eMMC)
  • MicroSD slot
  • Wireless — 802.11 b/g/n with antenna; Bluetooth 4.0 BLE
  • 2x 10/100 Ethernet controllers
  • Parallel LCD
  • I2S audio
  • Micro-USB OTG port (with power support)
  • USB 2.0 OTG (with power support)
  • 2x RS232
  • RS232 for Linux console
  • SPI, I2C, 2x CAN buses
  • Optional FPGA/ZPU-linked 16-pin expansion header (5x DIO, 1x SPI, 1x I2C) for optional daughter cards
  • 46x DIO (linked to FPGA)
  • 8x PWM
  • Accelerometer/gyro
  • 5V input via USB or via baseboard
  • 0.3W typical consumption
  • Operating temperature — -40 to 85°C
  • Dimensions — 75 x 55mm
  • Operating systems — Linux 3.14.52 (Ubuntu 16.04 and Debian Jessie)

Advantech SOM-5871 Module Introduces The New AMD Ryzen Embedded V1000 SoC

Taiwan based Advantech Co. has posted an introductory product page for a SOM-5871 module that appears to introduce the long-awaited next generation of AMD’s embedded R-Series SoC line. The R-Series is based on the same 14nm Zen Core already used in higher-end Ryzen SoCs. The new SoC is introduced as the “AMD Zen CPU Core” on the product pages and is called the AMD V1000 SoC on this Advantech COM Express teaser page.

Advantech SOM-5871 preliminary photo and specs
Advantech SOM-5871 preliminary photo and specs

According to the Advantech SOM-5871 product page, the AMD V1000 supports a core/thread of “2/4/8”. This obscure listing could mean it supports both dual-core, quad-threaded and quad-core, octa-threaded models, which are the configurations listed for the iBase Mini-ITX SBC. The iBase board also had the same memory support as Advantech’s SOM-5871. They both have up to 32GB of dual-channel DDR4-2400/3200 with optional ECC support.

Advantech also lists the SoC can have 1MB or 2MB cache, a 12-54W TDP, an integrated I/O chipset, and an SPI-based AMI 64MB BIOS. No clock speed information is available yet of this SoC. On the other hand, the Vega GPU embedded in this SoC has 11 compute units clocked at 1.5GHz and supports H.265 decode and encode and VP9 decode. The Vega also supports DirectX 12, EGL 1.4, OpenCL 2.1, OpenGL ES 1.1, 2x, and 3x, as well as OpenGL Next/OpenGL 4.6. The SOM-5871 module supports 4K video as well as four independent symmetrical displays.

SOM-5871 front view
SOM-5871 front view

No OS support information was mentioned for Advantech’s board. Most probably Linux and Windows support are available for SOM-5871, but the module is said to support the company’s iManager, WISE-PaaS/RMM, and Embedded Software APIs. In addition to the specs remarked above, the 125 x 95mm SOM-5871 Type 6 Basic module comes with dual GbE controllers (Intel I210 AT and I210 IT) and dual 6Gbps SATA III interfaces.

No pricing or availability information was provided for Advantech’s introductory SOM-5871 module or the iBase Mini-ITX and embedded signage PC products. More information may be found at Advantech’s SOM-5871 product page.

New Powerful Nano-ITX Form Factor ADL120S Single Board Computer For IoT

USA based ADL Embedded Solutions has introduced a new rugged, Nano-ITX form factor ADL120S single board computer (SBC). It is mainly produced for IoT, networking, and cyber-security applications. The highlighted feature of this SBC is its wide variety of PCIe expansion slots. The SBC includes 8x stackable PCIe interfaces, as well as optional custom expansion board services. Also, you get dual M/2 Key-B 2280 interfaces that support PCIe/SATA with USB 3.0. Networking is taken care with 4x Gigabit Ethernet ports (1x with PXE boot and WoL).

ADL120S Single Board Computer by ADL Embedded Solutions


The ADL120S runs Linux or Windows OS on dual- or quad-core Intel 6th Gen (“Skylake“) processor and Celeron CPUs that support an LGA1151 socket. There’s an Intel Q170 chipset on ADL120S instead of a Q170HDS. The supported SKUs include the quad-core 2.4GHz Core i7-6700TE, the dual-core 2.7GHz i3-6100TE, and 2.3GHz Celeron G3900TE.

The board has a compact dimension of 120 x 120mm in a Nano-ITX form factor but has a high vertical profile with 4x USB 3.0 ports piled on a single column. This high-rise board also includes 4x GbE ports, one of which has WoL and PXE Boot, and a pair of DisplayPort 1.2 ports with 4096 x 2304 resolution at 60Hz refresh rate.

The ADL120S comes with up to 32GB DDR4 RAM and offers a wide-range 20-30VDC (optional 12-24V or 20-36V) input and RTC (Real time clock) with battery. The boards with -20 to 70°C or -40 to 85°C temperature range of usability are available.

The SBC is also praised for its high MTBF, long-life availability, hardware and firmware revision control, obsolescence management, and technical, engineering and design support, on their website’s product page.

No pricing or availability information was provided for the ADL120S.

Researchers Innovated Highly Effective Silicon Microchannel Thermal coolers For Processors

One of the limiting factors for the computing power of processors is the operating temperature. A research team led by Dr. Wolfram Steller, Dr. Hermann Oppermann, and Dr. Jessika Kleff from the Fraunhofer Institute for Reliability and Microintegration IZM, has developed a new as well as an efficient cooling method by integrating microchannels into the silicon interposer. For the first time, it is possible to cool down high-performance processors from the bottom as well.

The integration of microchannels into the silicon interposer
The integration of microchannels into the silicon interposer boosts cooling and processor performance

When processors get too hot to work properly, they reduce their clock speed and operating voltage. In order to protect the CPU and motherboard from getting fried, the processors either reduce their computing speed or even shut off completely. Until now, cooling elements and fans are used to avoid overheating the heat-sensitive components. The researchers found a way to cool processors from the top as well as from below using a liquid-based cooling system.

The research team reports that the innovation can achieve a significant increase in performance. The scientists have also integrated passive elements for voltage regulators, photonic ICs, and optical waveguides into the interposer. This enables highly effective cooling and therefore higher performance. For this purpose, microchannel structures with tightly sealed vias are installed in the silicon interposer, which is located between the processor and the printed circuit board.

Interposers are responsible for the electrical supply and cooling of the processor. Every 200 micrometers, interposers are equipped with electrical connections to ensure the processor’s power supply and data transmission. In order to be able to absorb heat and channel it away from the processor, the researchers at Fraunhofer IZM created microfluid channels that allow coolant to be circulated through vias.

The main challenge to the researchers was to integrate the small channels into the interposer and seal them very tightly in order to separate them from the electrical paths. The solution they came up with is interesting – the interposer is made of two silicon plates – horizontally extending cooling channels and vertically extending channels. They are combined in a complementary manner.

Dr. Hermann Oppermann, the group leader at Fraunhofer IZM, said,

Up to now, the cooling structures are not very close to the computer core itself, which means the coolers are mostly applied from above. The closer you get to the heat source, the better the temperature can be limited or the output increased. In high-performance computing, in particular, the data rates are continuously increasing. Therefore, it is important to have an effective cooling to ensure a higher clock rate.

Open source 25-core processor can be stringed into a 200,000-core computer


Researchers at Princeton University have built a 25-core chip that can scaled easily to create a 200,000-core computer. by Agam Shah @ pcworld.com:

It won’t happen anytime soon, but that’s one possible usage scenario for Piton. The chip is designed to be flexible and quickly scalable, and will have to ensure the giant collection of cores are in sync when processing applications in parallel.

Open source 25-core processor can be stringed into a 200,000-core computer – [Link]

What Will Happen to Moore’s Law in 2021?

Moore’s law states that the number of transistors doubles every two years. Rachel Courtland from IEEE Spectrum explained the sharp turn of Moore’s law in 2021.

Moore2021Chip manufactures will switch to another way of boosting the density in the chip by having multilayer chips using vertical geometry, and we’ve already seen the 3D concept in silicon chips like 3D NAND Flash. According to 2015 roadmap released by International Technology Roadmap for Semiconductors (ITRS), by 2021, shrinking the dimensions of transistors in microprocessors will not be desired economically by chip makers, although the report of 2014 predicted that the physical dimensions would continue to shrink until at least 2028.

According to the article, the spirit of Moore’s Law could still there, where some changes in the technologies will still lead to pack more transistors in a given area.

Rachel also mentioned  that first international Rebooting Computing conference will be held in October this year 2016. It’s “Other ITRS participants are expected to continue on with a new roadmapping effort under a new name” Rachel said.

[Article on IEEE Spectrum]

Open-source microprocessor


Fabio Bergamin @ phys.org writes about PULPino which is an open source processor to be used on wearables and IoT.

In future, it will be easier and cheaper for developers at universities and SMEs to build wearable microelectronic devices and chips for the internet of things, thanks to the PULPino open-source processor, which has been developed at ETH Zurich and the University of Bologna.

Open-source microprocessor – [Link]