Tag Archives: RISC-V

LoFive – Tiny RISC-V Microcontroller Board

Small breadboard friendly development board using the SiFive FE310 RISC-V Microcontroller.

  • MCU – SiFive Freedom E310 (FE310) 32-bit RV32IMAC processor @ up to 320+ MHz (1.61 DMIPS/MHz)
  • Storage – 128-Mbit SPI flash (ISSI IS25LP128)
  • Expansion – 2x 14-pin headers with JTAG, GPIO, PWM, SPI, UART, 5V, 3.3V and GND
  • Misc – 1x reset button, 16 MHz crystal
  • Power Supply – 5V via pin 1 on header; Operating Voltage: 3.3 V and 1.8 V
  • Dimensions – 38 x 18 mm (estimated)
  • License – CERN Open Hardware Licence v1.2

LoFive – Tiny RISC-V Microcontroller Board – [Link]

Cinque, Combining RISC-V With Arduino

After announcing “HiFive1” at the end of 2016, SiFive is introducing its second RISC-V based development board “The Arduino Cinque“. It is the first Arduino board that is featuring RISC-V instruction set architecture.

Arduino Cinque is running SiFive’s Freedom E310, one of the fastest and powerful microcontrollers in the hardware market. It also includes built-in Wi-Fi and Bluetooth capabilities by using the efficient, low-power Espressif ESP32 chip. During the Maker Faire Bay Area on May 20th, only some prototypes of Arduino Cinque were available for demonstration.

The FE310 SoC features the E31 CPU Coreplex (32-bit RV32IMAC Core) with 16KB L1 instruction cache and 16KB data SRAM scratchpad. It runs at 320 MHz operating speed and it also has a debugging module, one-time programmable non-volatile memory (OTP), and on-chip oscillators and PLLS. FE310 also supports UART, QSPI, PWM, and timer peripherals and low-power standby mode.

The availability of the Arduino Cinque provides the many dreamers, tinkerers, professional makers and aspiring entrepreneurs access to state-of-the-art silicon on one of the world’s most popular development architectures. Using an open-source chip built on top of RISC-V is the natural evolution of open-source hardware, and the Arduino Cinque has the ability to put powerful SiFive silicon into the hands of makers around the world.
~ Dale Dougherty, founder and executive chairman of Maker Media

Details and other specifications of the Cinque are still poor, but we can expect its strength from the chips and SoCs it uses. It uses STM32F103, that has Cortex-M3 core with a maximum CPU speed of 72 MHz, to provide the board with USB to UART translation. ESP32 is also used as for Wi-Fi and Bluetooth connectivity.

Espressif ESP32 Specifications

  • 240 MHz dual core Tensilica LX6 micrcontroller
  • 520KB SRAM
  • 802.11 BGN HT40 Wi-Fi transceiver, baseband, stack, and LWIP
  • Classic and BLE integrated dual mode Bluetooth
  • 16 MB flash memory
  • On-board PCB antenna
  • IPEX connector for use with external antenna
  • Ultra-low noise analog amplifier
  • Hall sensor
  • 32 KHz crystal oscillator
  • GPIOs for UART, SPI, I2S, I2C, DAC, and PWM
A first look at the RISC-V-based Arduino Cinque, a SiFive R&D project.
A first look at the RISC-V-based Arduino Cinque, a SiFive R&D project.

The RISC-V Foundation is working to spread the idea and the benefits of the open-source ISA. Its efforts include hosting workshops, participating in conferences, and collaborating with academia and industry. The foundation had also worked with researchers from Princeton University to identify flaws with the ISA design. They presented their findings at the 22nd ACM International Conference on Architectural Support for Programming Languages and Operating Systems.

Open-V, The Open Source RISC-V 32bit Microcontroller

Open source has finally arrived to microcontrollers. Based on RISC-V instruction set, a group of doctoral students at the Universidad Industrial de Santander in Colombia have been working on an open source 32-bit chip called “Open-V“.

Onchip, the startup of the research team, is focusing on integrated systems and is aiming to build the first system-on-chip designed in Colombia. The team aims to contribute to the growth of the open source community by developing an equivalent of commercial microcontrollers implemented with an ARM M0 core.

The Open-V is a 2x2mm chip that hosts built-in peripherals which any modern microcontroller could have. Currently, it has ADC, DAC, SPI, I2C, UART, GPIO, PWM, and timer peripherals designed and tested in real silicon. Other peripherals, such as USB 2, USB3, internal NVRAM and/or EEPROM, and a convolutional neural network (CNN) are under development.

Open-V Chip Specifications

  • Package: QFN-32
  • Processor RISC-V ISA version 2.1 with 1.2 V operation
  • Memory: 8 KB SRAM
  • Clock: 32 KHz – 160 MHz, Two PLLs, user-tunable with muxers and frequency dividers
  • True Random Number Generator: 400 KiB/s
  • Analog Signals: Two 10-bit ADC channels, each running at up to 10 MS/s, and two 12-bit DAC channels
  • Timers: One general-purpose 16-bit timer, and one 16-bit watch dog timer (WDT)
  • General Purpose Input/Ouput: 16 programmable GPIO pins with two external interrupts
  • Interfaces: SDIO port (e.g., microSD), two SPI ports, I2C, UART
  • Programming and Testing
    • Built-in debug module for use with gdb and JTAG
    • Programmable PRBS-31/15/7 generator and checker for interconnect testing
    • Compatible with the Arduino IDE

RISC-V is a new open instruction set architecture (ISA) designed to support architecture research and education. RISC-V is fully available to public and has advantages such as a smaller footprint size, support for highly-parallel multi-core implementations, variable-length instructions to support an optional dense instruction, ease of implementation in hardware, and energy efficiency.

Open-V core provides compatibility with Arduino, so it is possible to benefit from its rich resources. Also when finish preparing the first patch, demos and tutorials will be released showing how Open-V can be used with the Arduino and other resources.

The Open-V microcontroller uses several portions of the Advanced Microcontroller Bus Architecture (AMBA) open standard for on-chip interconnection. This makes any Open-V functional block, such as the core or any of the peripherals, easy to incorporate into existing chip designs that also use AMBA. We hope this will motivate other silicon companies to release RISC-V-based microcontrollers using the peripherals they’ve already developed and tested with ARM-based cores.
We think buses are so important, we even wrote a paper about them for IEEE LASCAS 2016.

Open-V Development Board Specifications

Onchip team are also developing a fully assembled development board for their Open-V. It is a 55 mm x 30 mm board that features everything you need to get start developing with the Open-V microcontroller, include:

  • USB 2.0 controller
  • 1.2 V and 3.3 V voltage regulators
  • Clock reference
  • Breadboard-compatible breakout header pins
  • microSD receptacle
  • Micro USB connector (power and data)
  • JTAG connector
  • 32 KB EEPROM
  • 32-pin QFN Open-V microcontroller

Compared with ARM M0+ microcontrollers, power and area simulations show that a RISC-V architecture can provide similar performance. This table demonstrates a comparison between Open-V and some other chipsets.

OnChip Open-V microcontroller designs are fully open sourced, including the register-transfer level (RTL) files for the CPU and all peripherals and the development and testing tools they use. All resources are available at their GitHub account under the MIT license.

We think open source integrated circuit (IC) design will give the semiconductor industry the reboot it needs to get out of the deep innovation rut dug by the entrenched players. Just like open source software ushered in the last two decades of software innovation, open source silicon will unleash a flood of hardware innovation. The Open-V microcontroller is one concrete step in that direction.

A crowdfunding campaign with $400k goal has been launched to support manufacturing of Open-V. The chip is available for $49 and the development board for $99. There are also many options and offers.

Open Source Meets Hardware: Open Processor Core

SiFive, the first fabless provider of customized, open-source-enabled semiconductors, had recently announced the availability of its Freedom Everywhere 310 (FE310) system on a chip (SoC), the industry’s first commercially available SoC based on the free and open RISC-V instruction set architecture.

The Freedom E310 (FE310) is the first member of the Freedom Everywhere family of customizable SoCs. Designed for microcontroller, embedded, IoT, and wearable applications, the FE310 features SiFive’s E31 CPU Coreplex, a high-performance, 32-bit RV32IMAC core. Running at 320+ MHz, the FE310 is among the fastest microcontrollers in the market. Additional features include a 16KB L1 Instruction Cache, a 16KB Data SRAM scratchpad, hardware multiply/divide, a debug module, flexible clock generation with on-chip oscillators and PLLs, and a wide variety of peripherals including UARTs, QSPI, PWMs, and timers. Multiple power domains and a low-power standby mode ensure a wide variety of applications can benefit from the FE310.

Furthermore, SiFive launched an open source low-cost HiFive1 software development board based on FE310. As part of this availability, SiFive also has contributed the register-transfer level (RTL) code for FE310 to the open-source community.

The Arduino compatible HiFive1 was live on a crowdfunding campaign on Crowdsupply  and the board reached around $57,000 funding. Check this video to know more about HiFive1:

SiFive is now fulfilling a dream of a lot of developers: a custom silicon designed just for you! With the RTL code open, chip designers are now able to customize  their own SoC on top of the base FE310 by accessing the open source files provided on Github. But don’t worry, even if you don’t have the expertise needed to develop your own core, SiFive is offering a new service called “ chips-as-a-service” that can customize the FE310 to meet your unique needs. All you need is to register here dev.sifive.com, try out your ideas and finally contact the company to finalize the design of your new chip.

This service has completely a new business model for silicon chips businesses, and SiFive is willing to establish a “chip design factory” that can handle 1000 new chip designs a year. It is said that SiFive can start manufacturing the cusomized MCUs in less than 6 months after making sure that each use case is compatible with the Freedom E310 core.

“We started with this revolutionary concept — that instruction sets should be free and open – and were amazed by the incredible rippling effect this has had on the semiconductor industry because it provided a viable alternative to what was previously closed and proprietary,” said Krste Asanovic, co-founder and chief architect, SiFive. “In the few short months since we’ve announced the Freedom Platforms, we’ve seen a tremendous response to our vision of customizable SoCs. The FE310 is a major step forward in the movement toward open-source and mass customization, and SiFive is excited to bring the opportunity for innovation back into the hands of system architects.”

Opening the source of processors’ core has its pros and cons for SiFive. A new business model is assigned to SiFive due to the “chips-as-a-service” feature but in the same time it will open up some new ventures for smaller companies and hardware manufacturers to compete with the market dominating companies. Open source MCUs will bring a lot of updates to the hardware development scene and will pave the way for a whole new business of customized chip design provided by talented hardware system developers and architects.

To know more about the custom design feature visit the developers section of SiFive dev.sifive.com. Documentation of the SiFive new chip is available here and also source codes and files of the RTL code are provided at Github.

HiFive1, An Open-Source RISC-V Development Kit

By bringing the power of open-source and agile hardware design to the semiconductor industry, SiFive aims to increase the performance and efficiency of customized silicon chips with lower cost.

The Freedom E310 (FE310) is the first member of the Freedom Everywhere SoCs family, a series of customizable microcontroller SoC platforms, designed based on SiFive’s E31 CPU Coreplex CPU for microcontroller, embedded, IoT, and wearable applications. The SiFive’s E31 CPU Coreplex is a high-performance, 32-bit RV32IMAC core. Running at 320+ MHz.

FE310 Block Diagram
FE310 Block Diagram

SiFive recently announced the ‘HiFive1’, an open-source Arduino-compatible RISC-V development board that features the FE310 SoC. It is a 68 x 51 mm board consists of 19 Digital I/O pins, 9 PWM pins, and 128 Mbit Off-Chip flash memory. HiFive1 operates at 3.3V and 1.8V and is fed with 5V via USB or with 7-12V DC jack. The board can be programed using Arduino IDE or Freedom E SDK.

HiFive1’s Specifications:
  • Microcontroller: SiFive Freedom E310 (FE310)
    • CPU: SiFive E31 CPU
    • Architecture: 32-bit RV32IMAC
    • Speed: 320+ MHz
    • Performance: 1.61 DMIPs/MHz, 2.73 Coremark/MHz
    • Memory: 16 KB Instruction Cache, 16 KB Data Scratchpad
    • Other Features: Hardware Multiply/Divide, Debug Module, Flexible Clock Generation with on-chip oscillators and PLLs
  • Operating Voltage: 3.3 V and 1.8 V
  • Input Voltage: 5 V USB or 7-12 VDC Jack
  • IO Voltages: Both 3.3 V or 5 V supported
  • Digital I/O Pins: 19
  • PWM Pins: 9
  • SPI Controllers/HW CS Pins: 1/3
  • External Interrupt Pins: 19
  • External Wakeup Pins: 1
  • Flash Memory: 128 Mbit Off-Chip (ISSI SPI Flash)
  • Host Interface (microUSB): Program, Debug, and Serial Communication
  • Dimensions: 68 mm x 51 mm
  • Weight: 22 g
HiFive1 Top View
HiFive1 Top View

riscv-blog-logoRISC-V is an open source instruction set architecture (ISA) that became a standard open architecture for industry implementations under the governance of the RISC-V Foundation. The RISC-V ISA was originally designed and developed in the Computer Science Division at the University of California to support computer architecture researches and education.

In a comparison with Arduino boards, the HiFive has 10x faster CPU clock, larger Flash memory, and lower power consumption. The table below shows the difference between Arduino UNO, Arduino Zero, and Arduino 101:


HiFive may be a helpful tool for system architects, hardware hackers and makers, to develop RISC-V applications, customize their own microcontroller, support open-source chips and open hardware. It is also good as a getting started kit to learn more about RISC-V.

You can order a HiFive board for $59 at its crowdfunding campaign, and the full documentation is available here.

PULPino – An open-source microcontroller system based on RISC-V


PULPino is an open-source microcontroller system, based on a small 32-bit RISC-V core developed at ETH Zurich. The core has an IPC close to 1, full support for the base integer instruction set (RV32I), compressed instructions (RV32C) and partial support for the multiplication instruction set extension (RV32M). It implements several ISA extensions such as: hardware loops, post-incrementing load and store instructions, ALU and MAC operations, which increase the efficiency of the core in low-power signal processing applications.

PULPino – An open-source microcontroller system based on RISC-V  – [Link]