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# kcc

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1. ## 0-30 Vdc Stabilized Power Supply

Hello Again! Took me a little while to digest the latest post but I think now that I am set! The equations made it all clear and helped tremedously! One of the most confusing aspects to my understand went away when I (finally) realized that the Q2/Q4 transistors were configured as a Darlington pair and therefore had a Vgain near unity! Thanks so much for the patience and guidance offered! I'm off to build a power supply! Kevin
2. ## 0-30 Vdc Stabilized Power Supply

Indulis Sorry to drop out like that but the family and I nicked off for a short holiday to New Zealand. The entire statement makes perfect sense. The basic workings of an op-amp reduce the difference between the inputs to zero thru the feedback network. For an op-amp the output must be at a rail voltage if the difference between the inputs cannot be taken to zero. (Isn't that the second of the five ideal op-amp rules?) But this is exactly what is my trouble (and why I started this by asking about the gain) because it seems to me that you'd hit the negative rail pretty quickly if the gain is not fairly low. The current-set pot appears to be a simple voltage divider between 11.2V and 0V which allows the non-inverting input to vary from 5.6mV to 1.7V (Assuming perfect resistors, etc. etc). This is close to the range that R7 should drop (2mA to 3A should drop 940uV to 1.41). At the low end (2mA setting) the op-amp cannot have a gain of more than about 6 (5.6mV / 940uV) or U3 rides the rails. However when you look at the U3 from the output end, this gain doesn't make sense. In order for current regulation to be active, the output of U3 is limited to Vmax - 4V (Anything greater and Q3 is in cutoff due to biasing of R19 and R20) or in this case 38V - 4V). If U3 output is 28V then the gain of U3 is more like 5000. Of course if you stuck with a gain of 6 then the output of U3 would be about 33mV and the circuit would still work. It is these different possibilities that still have me wondering what the actual gain is and how it can be analysed. Thanks, Kevin
3. ## 0-30 Vdc Stabilized Power Supply

I was asking the gain in hopes of getting to understand what is confusing me a litte better. To that extent it IS an academic exercise. Unfortunately I've never worked with a simulator so I don't even know how difficult that would be. Yes. I realized that mistake after I had posted. I see it is not part of the feedback as the current would be flowing the wrong way I understand how the voltage regulation works. What I am questioning is what keeps U3 from acting as a comparator when current regulation kicks in. Your description about it being at the positive rail when R7 voltage drop is low makes sense but left me with the question about current regulation. I keep getting stuck on how far can U3's output come down from the voltage rail before the pass transistor is cut off. It has to be greater than 0.7 (otherwise Q3 would not turn on and the LED wouldn't lite) but shouldn't go all the way down to negative voltages. This is how I keep coming back to the gain in linear mode. Unfortunately, despite excellent descriptions by both you and audioguru, I'm still not quite cathching it. For the moment I'm going off to review the Art of Electronics chapter on op-amps and pay particular attention to the integrator circuit portion (since C8 seems to be the configuration for the most obvious feedback). Hopefully this will trigger some understanding! Wish me luck! When I can describe this to myself I will be happy. Until then, the pondering continues. Thanks for the help!!! Kevin
4. ## 0-30 Vdc Stabilized Power Supply

Indulis: I've been pondering on this all weekend. For the feedback loop to include D9, U2, R15, Q2, and Q4 wouldn't it have to include the load as well?? I don't see any path back to U3(-) input that doesn't include the load? Any guess as to what the gain would be? I'm currently looking hard at the LED branch since R19, R20, Q3, R22, D12 AND R7 would make a feedback loop. There was a comment in one of the threads that all of those components were part of the current regulator (of course I can't find it now :-( ) Any thoughts on that path? Thanks, Kevin "Still thoroughly confused but trying hard" C.
5. ## 0-30 Vdc Stabilized Power Supply

Current regulator is a better term than current limiter. I stand corrected! U3's output must go down to bring the difference between the inputs to 0. What I cannot see is what is limiting U3's output to a mid level voltage. It seems to me that any difference greater than 70uV should drive it to one rail or the other. The open loop gain is too high. Let me try a different question. If the power supply is in voltage regulation mode what voltage would you expect on the output of U3? What voltage would you expect when in current regulation mode? Thanks, Kevin
6. ## 0-30 Vdc Stabilized Power Supply

Audioguru: Sorry to continue on about this but I'm really trying hard to understand. It sounds like what you are saying is that the circuit is actually looking to use the open loop gain of the opamp of about 200,000 (110 dB) as per the spec sheet? The implication is that the total offset voltage between the two inputs could be about 70 uV before the output would be driven to either rail. But if you have a max of 3A across R7 the potential difference is 1.41V or about 20,000 greater which should drive the output to one rail or the other. The current-set pot appears to be a simple voltage divider between 11.2V and 0V which allows the non-inverting input to vary from 5.6mV to 1.7V. This is close to the range that R7 should drop (2mA to 3A should drop 940uV to 1.41) What interaction would there be with the output? I'm not at all sure what I'm missing here. I know the circuit works. I just can't get my head around how the current limit is controlled. Thanks for the help!!! Kevin
7. ## 0-30 Vdc Stabilized Power Supply

Good to be here. I see some very interesting projects! How is it that U3 acts as a linear amplifier with no feedback? Or am I simply missing the feedback loop? Without feedback a difference of a few mV should force the output rail to rail (or as close as the op-amp can come). Hence my thought that U3 is wired as a comparator. Can you describe the feedback loop? What is the gain of U3? Thanks, Kevin
8. ## 0-30 Vdc Stabilized Power Supply

Hi All: I've been studying this schematic and reading the two primary threads about this power supply for a few days now (and may I say special kudos to Audioguru and Kain for their fortitude in producing the 5A version). The circuit makes sense except for the current limiting function. I'm hoping somebody can explain to me how the current limiter acts in a linear manner. As I understand the project specs I can set the current limiter to a specified amount (e.g. 2 A). If the load's resistance causes it to draw more than 2A, then the voltage is reduced so that the current is maintained at 2A. What I don't understand is how this linear effect is achieved. It seems to me that U3 is the op amp (wired as a comparator since there is no feedback) used to kick in the current limiter when the voltage drop across R7 exceeds the the preset value assigned by the voltage divider of R18, P2, and R17 (11.2 Volts across 66.033 KOhms is not a lot of current). When V of R7 is greater than the wiper of P2, the comparator output goes negative to just a volt or so above -5.6V (-4.6V). This will forward bias D9 and make the voltage on the non-inverting input of U2 about -3.9V This is a low voltage which I'm surprised doesn't turn off the output completely but in any case I do not see how the voltage into U2 could be anything other than this value when current limiting is on. The output of U3 is near the negative rail (as expected from an comparator) and there is a fixed voltage drop across D9 resulting in a fixed value into U2. There doesn't seem to be any components that can vary their voltage or current to reduce the bias into the pass transistor just enough to maintain the 2A. I've looked closely at the parallel return path thru R9, R8, P1, R7, and D7 but the resistance thru D9 and U3 is much lower than the other path and should dominate the value of the voltage into U2. I do realize that this circuit has been built, does work and obviously my analysis is the problem here. If somebody could explain to me the voltages around the current limiter when it is on I think I'll understand the circuit completely. I'm pretty sure that R9 and R8 will play into this somehow but if their purpose can be highlighted I'd be very grateful. Thanks in advance for the help!!!!! Kevin
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