Kerrowman

Hi Harry, I’m sure it’s very good and interesting but it deals with far more than I need to address linked to my research studies. I simply don’t have the time anyway with publication deadlines. Is there no guidance you can offer on the specific question as to where I would probe the sim circuit to observe resonance? J

Hi Harry, I have obtained a fairly good Spice model now, as per the diagram, that works quite well. It is not especially accurate in calculating efficiency, since the model does not include skin effects and other parasitic inductance and capacitance values. I have attached some calculations using this. My query now is, how would the resonance of the LCR circuit show in the sim circuit? By that, I mean what node measurements would I make, and any ensuing calculations, to show that at a certain frequency, resonance was occurring? I have done a nominal calculation on the diagram which suggests that resonance might occur at just over 2Hz, but it may be different when it comes to pulse charging, in contrast to DC or a sine wave. Any thoughts would be appreciated. Thanks

Actually, I now understand that all the discharge energy will in fact be dissipated in the electronic load, so there is no 50% here. So my question changes to: assuming the sim components are accurate, how can one use the sim data to derive the efficiency of the delivery of energy to the capacitor? It should be relatively straightforward to measure and calculate the resistance from the coil to the capacitor, consisting of the coil’s resistance, Rds On for the FET and the resistance from the Drain to the capacitor. Knowing the energy held in the capacitor from the discharge, together with the transfer efficiency, will give what was initially ‘sent’ to the capacitor. Assuming a 95% efficiency, for example, is not accurate enough for the data to test the hypothesis proposed for my 2nd study. Harry, I have just noticed an error on your sim design. My capacitor is 53milliF not 53microF. That will change a few things. 😊

Hi Harry, Thank you, that is very interesting. The VDS (a comparator and high-sided P-FET) is just a way to discharge the capacitor so it can repeat its charging and show multiple traces on the scope from which I can take measurements and do calculations. Is it possible to determine the energy transferred to the capacitor from the voltage and current values indicated by the graphs? What is even more important is for me to determine what energy is transferred during a discharge to a regular load. In the past I have done this using an electronic load (computerised battery analyser) and where I read off the Wh dissipated. This is shown in this image (also attached): https://ibb.co/xGcTdrq So if the losses in discharging like this are always precisely 50% then I can say that the energy the cap held before discharge was 62.1J / 0.5 = 124.2J. But if the resistive losses are not 50% then I would need to calculate it, maybe by first finding out the resistance value of the electronic load? Julian

Hi Harry, I am reliably informed that the circuit I posted is pretty much the same as a Boost Converter (with my added VDS) where the transfer of energy on charging is close to 100% due to the way the energy is stored in the coil’s magnetic field before being transferred with high efficiency to the capacitor (with some very small resistive losses). That being so the remaining question is what % is lost when one discharges the capacitor into a regular load, such as another battery or an electronic load? Does it loose 50% precisely like conventional charging with DC or can it vary? If you get the sim to work it will be interesting to see if it predicts or shows the same. Incidentally, you gave me some help a couple of years back on various themes and you might be interested to see what it was leading to. My recently published paper will explain and I acknowledged you, amongst various others, in the replication manual. https://doi.org/10.33140/JEEE.03.04.05 Julian

I have some queries regarding capacitor charging using inductively generated HV pulses, in contrast to with regular DC. First, to check my understanding, I will recount the situation with non-pulsed DC. If the energy supplied by the battery U = QV then the capacitor will always(?) receive and store 1/2 QV (= 1/2 CV^2) due to resistive, inductive and radiative losses. So with a known value of capacitor being charged from a voltage Vmin to Vmax, as seen on a scope trace, one can calculate the energy stored and compare it to what was delivered by the battery and, at best, this will be 50%. In practice it will likely be less due to other losses. If the capacitor is then discharged, whatever energy was stored will again incur resistive losses, (possibly up to 50%?) such that, over a complete cycle of charging and discharging, perhaps only 25% of the original energy supplied by the battery is available for whatever the discharge energy might be used for. Looking now at the situation with HV pulses, of the sort produced from the field collapse of a coil (flyback pulses), then the situation may be quite different and I am seeking to understand how charging takes place and, more importantly, the losses incurred during the charging and discharging stages. With reference to the diagram on the link below, the capacitor is made up of 4 x 15mF 80V low ESR caps connected in parallel and with a combined measured value of 53mF. https://ibb.co/ZTLJNpR The output pulses have a peak voltage of 1.7kV, a FWHM of 20us and a PRF of 50Hz and, on the face of it, the time-averaged voltage across the capacitor is zero since after the pulse rise time to a peak voltage it returns again to zero before the next pulse. However, practical measurements show a very real and rapid rise in capacitor voltage using such pulses, so clearly the pulses are resulting in a positive charge and voltage differential across the capacitor plates. What I presume is happening is that with each HV pulse the capacitor starts to charge a little and, when the pulse voltage returns to zero, the capacitor is unable to discharge due to the presence of the top diode and the VDSwitch. As such the capacitor charges in small discrete steps in a staircase fashion and this is what appears as the ‘fuzzy’ charging curve on the 'capacitor voltage’ insert. Assuming this is basically correct, of more interest is what losses are incurred in the charging and discharging stages and whether they are larger or smaller than with regular DC? The reason for the interest is for my research into non-linear and ‘far from equilibrium’ effects of these voltage transients on batteries and capacitors. If the losses are such that, in a complete charge and discharge cycle, I am going to see more or less than approximately 25% of the battery input energy, then that is very significant. Sorry for the long post but it’s important that I give a clear picture of the setup and context.

Hi Harry, That’s good of you to do a spice test and if I was starting from scratch then using a microprocessor would have been the way to go. However, I should have made it clear that I already have the cap discharge circuit in operation, that charges up a bank of capacitors to 24V then releases the stored energy as a high current pulse down to 17V. You can see the unit in the bottom left corner of the unit in the pic. So I presently have a system of delivering the HV pulses to the batteries directly (with swapping) or the high current pulses from the ‘cap dump circuit’ but not mixed in the way I have described in my brief and post. Therefore I’m looking to revise the main PCB with some additional elements to do the timed routing I described and not change the cap dump circuit. Hence my suggestion of an SSRelay with a timing circuit. Using an Arduino would take up too much space whereas an SSR and some timing component’s I can fit onto the present PCB format. Incidentally I credited your help in the past, amongst others, in the Acknowledgments in my ‘replication manual’ for this device. This is part of the scientific process for results publication in the future so that any one can replicate the findings. You can see the manual here: https://www.dropbox.com/sh/td55b8675vvqtbg/AADzPSKMOI8q_YM1cFUT2T07a?dl=0 (I have temporarily removed the PCB files while I explore the circuit revision) Assuming the SSR idea is sound then I’m trying to figure out how to set the relay with a short 4ms pulse (as per the earlier diagram) and then reset it after the adjustable period (30-200ms). Perhaps I need a latching relay instead but haven’t found a small DIP 8 format one. Your thoughts are appreciated. Julian

Hi Harry, I appreciate that you probably don't have time to read design briefs like the one I sent so I have proposed a design that hopefully you can comment on. To clarify, the circuit needs to switch an input from one output to another for a set duration (30-200ms) starting when a trigger signal arrives. The sequence of events is as follows - a trigger signal arrives to operate the relay which directs the ‘Input’ to a different output (from ‘Output 1’ to ‘Output 2’) and then, after a preset interval of between 30 and 200ms, directs the input back to ‘Output 1’. For this, I am thinking of using a solid-state relay (LCC120) triggered by some form of timing circuit that will send the trigger signal through to flip the relay at the start of the interval but then send out a low after the set duration to flip the relay back i.e. the input back to output 1. (see attached) If I use a decade chip like to 4060BE, then it will only go high after a set number of oscillations from its inbuilt oscillator and so won’t operate the relay at the start, so I need a timer that is enabled by the ‘tigger signal’ to operate the relay and then, after a preset interval, turns off the relay so it reverts to its original output. Can you suggest an alternative timer method or any additional components to make this work? Thank you Jules

Hi Harry, It will be a lot easier if I attach a two page design brief that explains what I’m trying to do in modifying my current setup. As you will see the duration of the ‘divert’ needs to be adjustable. Julian Design Brief (Combined pulses).pdf

What is the best way to divert some 0.5-1.7kV inductively generated flyback pulses from one destination to another and then back again after a short period without using a relay, which would probably be too slow and inaccurate to set the duration of the ‘divert’? Can this be done with an FET/ IGBT or is there a better and more obvious way? Thanks

Hi Harry, Yes, 1/2 CV squared is a quick way to calculate the energy in a capacitor but there are three reasons why using a CBA is preferable and helpful, bedsides the fact that I already have one for the extensive Coefficient of Performance tests done over the past six months, as detailed in the report I sent via the link in the pm. Firstly, knowing the exact capacitance of the 6 supercapacitors I have in series is not easy to determine. 6 x 500F caps in series should be 83F but they are often only about 300F each so it’s more likely to be around 50F. Sticking my meter across them doesn’t give any reading even after 30mins due to their large value. Secondly, the CBA provides me with the detailed graphical information for the total energy dissipated through the electronic load as well as the process and rate of charging etc. Lastly the CBA gives me a safe way to dissipate and release the energy they contain to bring them safely down to zero. I calculated that a 50F bank of caps at 15V ‘contains’ 5.63kJ which, if there was a short across the terminals could generate over 50kW of power in 0.1s so having a way to discharge them and see the process is also desirable. I acknowledge that ESR is a factor but that mostly applies to AC circuits and this is DC all the way. It’s good to know that I shouldn’t need any additional buffering between the caps and the CBA. Julian

Ok but if I’m using an electronic load to discharge the capacitor (so I can measure the energy it can deliver) once it’s been charged, then do I need the buffer of a DC-DC converter. Won’t the electronic load (https://www.westmountainradio.com/product_info.php?products_id=cba5) serve that function?

Hi Harry, I hadn't realised that super capacitors were now so cheap and so I have come up with a plan to test the energy in and out as shown in the attached graphic. Am I right in thinking that after charging the capacitors, if I shorted the output terminals of the DC-DC converter that there wouldn't be a massive discharge? Julian

Hi Harry, Thanks for your thoughts. I think it’s only fair that I give you some context for my query. For the last few years I have been researching and testing a hypothesis regarding energy harvesting using inductively generated HV transients. Here pulses are delivered to a battery and certain energy gain effects have been observed. If you are interested to read an internal report about this work then I have sent you a link via a pm. I will be writing a full scientific paper in the new year after I have completed the power tests. The capacitor issue is a way to add further validity to my findings. In order to observe the process independently of battery chemistry, it is proposed to replace the batteries with capacitors. I know that capacitors charge up very well with the pulses as they formed part of a ‘cap dump circuit’ that was integrated into the system as part of the testing to compare dV/dt effects with dI/dt ones. The question is, can a capacitor be used in the same way as a battery, which is in effect a big capacitor, and controlled in a similar way to a one? Your suggestion of the DC-DC converter (either Buck or Boost?) sounds an interesting option and worth exploring but what would be a suitable capacitance to replace an 18Ah Lithium Phosphate battery and a what sort of cost? As an aside I note you enjoy woodwork. Besides photography I also do wood turning that keeps me very grounded. I look forward to your thoughts. Regards Julian

Hi there, I would like to know if I can use a large capacitor to store energy on the way that I currently do with an 18Ah lithium battery? My understanding is that with the minimal internal resistance of a capacitor, they can discharge their energy very fast even though the energy density is not as big as that of a battery. With this natural tendency for a fast discharge then how could one regulate the output current to a steady dependable rate without inserting some resistance to increase the RC value very significantly. Also there will surely be energy wasted as heat through any such resistance. So to be more specific to my application, I am currently storing energy from HV transients in an 18Ah LiFePO4 battery and then later using that energy to run a small load. From past experience I know that my HV transients can quickly charge up a bank of capacitors (50mF) but would it be feasible to use that energy, with additional energy from a PSU for example, to run the circuit that is producing the transients in the first place? Is that an option or are there too many technical hurdles, due to the nature of capacitors, to make that efficient and workable? I also expect such large value capacitors (1-2F) would be very expensive. Thanks