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Need help driving two IPS1031 Low-Side MOSFETs from a PIC


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The IPS1031 is a Low-Side MOSFET Driver that drives its own MOSFET. I am planning on incorporating it into my design, but most of its spec sheet is total gibberish to me.
I am driving two of them off of a single PIC output which can sink 3.7-5V @ 25mA.
The IPS1031 datasheet: http://www.irf.com/product-info/datasheets/data/ips1031.pdf

Attached is a schem I used for its simulations purposes. Through the use of "OR" diodes, only two IPS1031s are on at any single time; Q2 is saturated when either Q1 or Q3 is saturated. S1 and S2 signafy two different PIC Outputs.

post-21544-14279143026735_thumb.jpg

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Thanks Theatronics, that clears up most of the issues. But with the combination of the diode voltage drop, and the pic output which probobly wont be anything more than 4.5 volts, will the MOSFET still function? a voltage drop of .7 with 4.5 volts is about 3.8 volts. The MOSFET can't hardly function at this? This was my intended question, becuase I was told that a PIC output could handle a dozen these particular MOSFETs.

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Theatronics thanks for the diagram, I really appreciated that you took time to help me on this! I have decided to go with a design that I had in mind, which was earily similar to what you drew up for me. I'm just glad that you came up with a similar design , it shows that this might work afterall  ;) . I might post the new schematic up later.

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see, that’s the problem with using a CAD program to 'Sketch' something.
I should have just drawn out the thing by hand and left it more
ambiguous.

I am not sure.  I did say that the values needed to be 'fiddled' with.
I built a setup like that once but it was a while ago.  the 10Kohm should show
+5v when the transistor is in cutoff.
When the NPN goes into sat the current through the 10K will be determined by (beta) times Ib.  If the 2.2k is seeing 5v then calc would be (Roughly)
(5v - .7 = 4.3v)
(4.3v / 2.2k = 1.95ma)
(Given a beta of 120: 1.95ma * 120 = 234ma)
So the current through the 10k should be 234ma ?
well, the Vcc is 5v and 234ma * 10K = 2340v.  Because that is not possible
the Transistor must be in saturation.  As a result the entire Vcc must appear across the 10K.  As a result the Vbe at the second NPN would see near 0 Volts.  Even if it saw above .7 volts due to junction voltages within the first transistor, that should not be enough to cause the second transistor to go into saturation and pull the output low.

If the first transistor is in sat. and there is a bias on the base of the second stage of lets say 0.7V.  That 0.7v wouldn’t overcome the Vbe knee and therefore the second transistor should stay in shutoff.  If there were a Bias on the base then a simple voltage divider (A second 2.2k to ground) would cut the bias in half and put us back in control.

When the first transistor goes back into shutoff, the entire 5V is expressed on the base of the second transistor, through 12.2k ohms of course.  12.2K ohms @ 5v yields 0.41ma.
0.41ma * 120 = 49ma.  49ma though the second 10K resistor is 491 volts.  Again the transistor is in sat so the whole voltage applied appears across the second 10K and the Collector appears to be at 0V. (Or darn close)

Unless I am overlooking something, I think I got it right.  Or at least close enough.

It was just an example of the concept.  If it were me I'd use a driver chip to shape the signal, A quad Op-amp would work.  But because he had already mentioned a transistor style set up I went with that as an example.

-Mike

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