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evengravy

JFET Mic Pre Advise Please

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Hey,
I have been slowly teaching myself audio electronics over the past few years (part time). My knowledge is somewhat lacking to say the least, so please excuse this. I am trying to design a simple twin stage JFET mic preamp with components I have laying around, I have plenty of these (100 x 2sk170bl, 150 x 2sk117gr) so matching for Idss shouldn

post-38176-14279144084297_thumb.jpg

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Why use Jfets? Why not use an audio opamp instead?
Why use an expensive condenser mic that needs a 48V supply? Why not use an inexpensive but high quality electret mic instead that has the 48V built-in on its electret material? An electret mic needs to have its built-in Jfet to be powered.

Your 2SK117 Toshiba Jfets have a wide range of IDSS and transconductance (voltage gain). A resistor from the source to ground will add negative feedback to reduce the effect of the wide range of IDSS. It can be bypassed with a capacitor to keep the AC gain high.

A gain of 59dB is almost 1000 times so talking at a normal level to the mic (10mV output) will result in an output from your preamp that tries to go to 28V peak-to-peak.

You saved and posted your schematic as a fuzzy JPG file type instead of as a very clear GIF or PNG file type.

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I don't see anything wrong with the schematic, it's not fuzzy, audioguru should think about getting his eyes tested. ;)

JPEG is only bad if it's set to low quality or the picture has been edited loads of times. I recommend PNG or GIF schematics but I certainly wouldn't chastise anyone for using JPEG, as long as it's clear.

Wikipedia explains the JPEG quality setting. Simple painting programs such as MS Pait don't allow you to set the quality, real image editing programs such as Adobe Photoshop and Gimp do.
http://en.wikipedia.org/wiki/Jpeg#Sample_photographs

I would recommend an op-amp such as the TL072 but I know it's probably not a solution as you require a discrete design.

Does it have to be all J-FET?

Can you use bipolar transistors as well?

I'd recommend using a J-FET for the input stage and BJTs to provide the gain.

The phantom power supply needs to be DC to a transformer can't be used. An AC coupling capacitor can be used to connect the microphone if its floating at a different DC voltage to the amplifier.

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Firstly thanks for the responses guys,

Audioguru: "Why use Jfets? Why not use an audio opamp instead?" i am looking to avoid opamp designs for personal reasons, I hate the fact the signal goes through so many stages, i love the sound of jfets and their gracefull distortion/overload characteristics.

"Why use an expensive condenser mic that needs a 48V supply?" well... I work in a professional recording studio as an engineer and working with phantom powered mic's is completely unavoidable.

"A resistor from the source to ground will add negative feedback to reduce the effect of the wide range of IDSS"  The idss is 4 - 6ma for the 2sk117gr that I have so the spread is not so wide in comparison to other JFETs although still a wide enough variation I guess, I will look into this, thanks, how do i calculate the source resistor and drain resistor to bias the FET correctly?

"A gain of 59dB is almost 1000 times so talking at a normal level to the mic (10mV output) will result in an output from your preamp that tries to go to 28V peak-to-peak." ok,  so I would need to limit the gain somewhat in the first stage, I was thinking this would be an issue, how would I go about this, resistance on input? also would increasing the source voltage to 36V help in this regard?

thanks for responses, also sorry about the image, it is perfectly clear when previewed on my machine.......

Hero99 "Does it have to be all J-FET?" well I would like to keep it that way really yes, the toshiba parts are beautiful sounding to me.

"The phantom power supply needs to be DC to a transformer can't be used" not sure what you mean by this could you clarify please

"An AC coupling capacitor can be used to connect the microphone if its floating at a different DC voltage to the amplifier." I am aiming to have two independant power supplies, one at 48v for phantom powering and a seperate supply at either 24v or 36v for the preamp.

thanks again guys


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Why not use an audio opamp instead?  i am looking to avoid opamp designs for personal reasons, I hate the fact the signal goes through so many stages, i love the sound of jfets and their gracefull distortion/overload characteristics.

More stages of amplification = more gain = more negative feedback = lower distortion.

A correctly designed op-amp circuit will have much less distortion than any circuit lashed together from transistors. If the circuit is properly designed the you won't have to worry about distortion, graceful or otherwise because it will never clip.

Check out the LM4562 which has a THD of just 0.00009% which is much better than any discrete amplifier and far below the level you can hear.
http://www.farnell.com/datasheets/90066.pdf

It's quite expensive but you get two op-amps in one package which you can use for stereo.
http://uk.farnell.com/national-semiconductor/lm4562na-nopb/op-amp-audio-dual-hf-8-dip-powerwise/dp/1685366

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The voices of most TV announcers and reporters are badly clipped.
The sounds on some CDs are badly clipped.
But a vacuum tube or Jfet clips "gracefully" and does not sound as harsh as an opamp that is clipping.

I have heard many compressors that cause horrible distortion because their attack time is too slow and allow the signal to blast though with severe distortion until its level is cut down.

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The voices of most TV announcers and reporters are badly clipped.
The sounds on some CDs are badly clipped
But a vacuum tube or Jfet clips "gracefully" and does not sound as harsh as an opamp that is clipping..

If the source is clipped, then it doesn't matter how good your amplifier is, it won't sound any better.

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The overload characteristics are exactly why I want jfet, I can design an opamp preamp quite easily and don't want to go down this road again as I already own some very low noise opamp pre's, some based on the ina217 which I built recently, these are very very good but opamp designs from a personal sonic perspective always sound somewhat clinical. Clean sound is not always what is required during a recording session.

Although in electronics design you aim to reduce distortion as much as possible, in my case the distortion characteristics of the jfet, which are similar in respect to tube designs, is exactly the attraction. Also I want to learn how to properly design Jfet circuits. The aim for me is to have a circuit which can be offer clean amplification at average gain settings but can also be overdriven slightly if that overloaded tone is warranted.

Appologies for sticking to my guns on this one, but I am looking to learn these technologies also.

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Disclaimer I'm no expert with discrete JFET amplfiiers.

Just a few things I've noticed about your circuit:

The gates of both transistors are biased at 0V which will bias them too far on. Ideally Vgs should be kept negative and should never exceed the 0.6V turn on voltage which will probably happen to Q2 on positive cycles.

There's no negative feedback which can't be good distortion wise.

Is R9 supposed to be the load?
The output impedance is 4.03k so it won't be able to drive a 49.9R load.

What purpose does R3 serve when it's in parallel with a 10k resistor?

What does D1 do? It looks like a clamping diode to protect the input. Why use a zener rather than a normal silicon diode? A normal silicon diode will do.

How much of the amplifier design is going to be JFET?

If clipping occurs in the power stage it'll sound horrible unless you're using valves (tubes) which generally sound inferior to solid state components when not clipping.

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I think Mr Evengravy records electric guitars so he likes the even harmonics distortion caused by Jfets and vacuum tubes. He also likes overdrive but not the severe clipping distortion produced by opamps.

He is lucky that the Japanese Jfets are binned into fairly low ranges of conductance.

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"think Mr Evengravy records electric guitars so he likes the even harmonics distortion caused by Jfets and vacuum tubes. He also likes overdrive but not the severe clipping distortion produced by opamps. "

pretty much spot on, the pre will have DI input for guitar plus a transformer to allow mic input/phantom power and pad switch on secondary of transformer.

He is lucky that the Japanese Jfets are binned into fairly low ranges of conductance.


I bought so many of the toshiba parts for this very reason, shame they don't make them any more. :(

"The gates of both transistors are biased at 0V which will bias them too far on"

thanks, I thought this would be an issue, after some reading today I'm pretty confident I know the correct way to select a source resistor to bias correctly.

"Is R9 supposed to be the load? The output impedance is 4.03k so it won't be able to drive a 49.9R load."

R9 is connected to the xlr port grounding pin 3, to be honest I found this value is common on many preamp outputs so this is why it was chosen. Is this inncorrect then?

"What purpose does R3 serve when it's in parallel with a 10k resistor?"

Oh yeah, this should have been removed, I began by designing a single stage and was left over after the copy/paste of first stage if i remember correctly.

"What does D1 do? It looks like a clamping diode to protect the input. Why use a zener rather than a normal silicon diode? A normal silicon diode will do."

Since I intend to use the unit as a guitar DI as well as a Mic preamp this zener diode was to protect the input Jfet from voltages from accidental hot plugging, so a silicone diode will work in this case, I think the value should be closer to 1v (if these are available that is)

"How much of the amplifier design is going to be JFET?"

well i've been doing some more analysis today with average mic output data obtained from spec sheets:

Max dBu (approx 140dB spl) = +10dBu (2.45 Vrms, 3.46Vpk )

High dBu (approx 130dB spl) = 0dBu (0.77 Vrms, 1.08Vpk)

Loud dBu (approx 120dB spl) = -10dBu (0.245 Vrms, 0.35 Vpk)

Average dBu (approx 97dB spl) = -36dBu (0.016 Vrms, 0.023Vpk)

with these figures the 2sk117gr can handle one stage of amplification achieving approx 34dB of gain (if my analysis is correct) so..... I will have to rethink this. I was thinking of following the first jfet stage with a bjt pair, this will give me a better impedance for the output. Although the single stage will be out of phase.

Any other suggestions are very welcome.

thanks guys I appreciate your comments/suggestions





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R9 is connected to the xlr port grounding pin 3, to be honest I found this value is common on many preamp outputs so this is why it was chosen. Is this inncorrect then?

What does the xlr grounding pin do?

If 49.9R is recommended then use it.

What load is the pre-amplifier driving?

It needs to have a significantly higher impedance than 4.02k, as a general rule of thumb, it should be at least ten times higher otherwise the gain will be reduced significantly.

Since I intend to use the unit as a guitar DI as well as a Mic preamp this zener diode was to protect the input Jfet from voltages from accidental hot plugging, so a silicone diode will work in this case, I think the value should be closer to 1v (if these are available that is)

The input only needs to be protected against negative voltage spikes. If a positive spike occurs the JFET's gate will just conduct diverting it to 0V, you'll hear a pop but it won't be damaged. An ordinary silicon diode connected between the input and 0V will clamp the voltage at -0.6V. It's also a good idea to AC couple the input so the bias isn't altered by changing the input impedance.

Just another general comment: why are you using precision E96 resistor values for non-critical resistors? Rounding to the nearest E24 is normally good enough, i.e you'll probably find it cheaper and easier to buy a 3.9k resistor than a 4.02k resistor, same with 49.9R, I'd use 51R.

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"What does the xlr grounding pin do?"
Not sure to be brutally honest, I'll have to look into this, although it is on almost every preamp schematic that I have seen so far.

"What load is the pre-amplifier driving?"
Hmmm........well it will be driving a professional line level sound card, impedance is approx 20kΩ balanced and 10k unbalanced.


"An ordinary silicon diode connected between the input and 0V will clamp the voltage at -0.6V"
thanks for this, will the orientation be the other way round to the zener currently in the circuit?

"It needs to have a significantly higher impedance than 4.02k"
I think i have achieved 47k with the adjustments made in the image attached, one amplification stage shown for clarity. The current draw may be quite high however. comments?

"E24 is normally good enough"
understood, would there be any difference in terms of noise produced with metal film resistors vs standard E24 ones?

Note: I have the actual schematic on my own laptop at home and don't have access to it right now so please excuse the image which i have drawn.

post-38176-14279144088337_thumb.png

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"An ordinary silicon diode connected between the input and 0V will clamp the voltage at -0.6V"
thanks for this, will the orientation be the other way round to the zener currently in the circuit?

Why would you need to swap it round?

I don't think you understood me: you only need to clamp the negative pulses, the JFET's gate behaves like a forward biased diode when the gate voltage is higher than the source, which will clamp any high voltage positive spikes.

"It needs to have a significantly higher impedance than 4.02k"
I think i have achieved 47k with the adjustments made in the image attached, one amplification stage shown for clarity. The current draw may be quite high however. comments?

The output impedance needs to be as low as possible, for example if you need to drive a 10k, the output impedance should be 1k or less. The circuit you've attached, includes an emitter follower stage to buffer the JFET amplifier, allowing it to drive a very low impedance.

"E24 is normally good enough"
understood, would there be any difference in terms of noise produced with metal film resistors vs standard E24 ones?


To answer your question, metal film resistors are far superior to carbon film in terms of noise, stability and tolerance.

I'm not sure if you understood when I talked about E96 and E24 values.

Resistors are normally only made in standard logarithmic value ranges. This saves the manufacturer money, as they only have to make resistors in a thousand or so values, instead of millions.

http://en.wikipedia.org/wiki/Preferred_values#E_series:_Capacitors_and_resistors

This means there's no point in specifying an 8k5 or 60R resistor, in most cases an 8k2 and 62R should suffice, if it's critical, then use other values in series or parallel i.e. 7k5 and 1k in series and two 30R in series for 8k5 and 60R respectively.

It also means it's cheaper to buy E24 values, rather than E96 values. You can normally buy 1% metal film resistors in both E24 and E96 values.

When designing a circuit you should always aim to use the lowest E-series values possible i.e don't use 51R when it could easily be 47R.

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You have sketched a class-A heater. Usually the bottom transistor is connected as a constant current sink but yours is turned on hard all the time. Use a resistor instead of the bottom darlington.

Metal film resistors produce a little less noise than carbon film resistors and also are made in 5% tolerance.

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I thought it was supposed to be a pre-amplifier?

The bottom transistor is set up as a constant current sink, albeit not a very good one. The trouble is the current will be 63mA which is far too high for a pre-amplfier and will melt a small signal transistor.

It might not be this bad, he did say the circuit is incomplete so we'll have to wait for the final version.

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"I'm not sure if you understood when I talked about E96 and E24 values"

oh i understood ok, just wondering whether metal film E24 values are superior to carbon E24 values in terms of noise.

"You have sketched a class-A heater.."

haha, might be usefull its freezing here in ireland

ok, heres the full first stage with part numbers, Q4 is a Darlington which was chosen merely due to its voltage rating and I was under the impression that using a darlington would minimise loading on the jfet (higher input impedance)

the bc635 is a generic npn, again chosen due to its voltage rating suiting my supply voltage (technical I know).

really just trying to achieve a source follower for impedance. can you recommend part values and arrangement at all?

thanks again guys, really helpfull.

post-38176-14279144090147_thumb.png

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Using a Darlington is good because the gain is higher, (normally 10,000 without looking at the datasheet) meaning the input impedance will be higher.

Why have you insisted on a non-standard value  (8k5 isn't even an E192 value) for R1, is it merely because you have it in stock?

As mentioned beford, the current though Q3 and Q4 is too high.

4.332mA through Q1 seems too high, if it's correct, it means the drain will be at 1.56V and the output will be biased close to 0V so the constant current sink won't work. I think it's more likely to be about 1.6mA so the drain voltage will be about 22V.

Increase the value of R2 to reduce the current through Q3; hint: the base impedance is equal to the Hfe multiplied by R5.

Even better, add a couple of diodes between Q3's base and 0V to make the current virtually independent of the power supply voltage and if you don't change the value of R5, the current will be 6mA which is perfect.

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"Why have you insisted on a non-standard value for R1"
basically I am a little confused as to bias the fet correctly, my take on it from my reading was to aim for a figure close to the measured Idss of the measured device (gate and source connected and voltage applied with no signal) with a 50ohm source resistor the drain resistor value to bias close to 0v just happened to be 8.5k. I think I can choose a standard resistor value close to this value without significant change to the bias.

"4.332mA through Q1 seems too high"
maybe i'm measuring the current incorrectly. I'm measuring from Q1 drain to ground, is this correct. current measured is 4.322mA (18.5v at drain) which is close to the Idss value I have measured for the Fet.

oscilloscope measurements of the amplified output are swinging about 0 almost perfectly, with and without the source follower section attached so I took this to mean my biasing was at least somewhere close to being correct.

"add a couple of diodes between Q3's base and 0V"
ok, what type of diodes would be suitable for this application? and would you add two in series?

sorry for so many questions, i really appreciate your help.

post-38176-14279144092741_thumb.png

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"Why have you insisted on a non-standard value for R1"
basically I am a little confused as to bias the fet correctly, my take on it from my reading was to aim for a figure close to the measured Idss of the measured device (gate and source connected and voltage applied with no signal) with a 50ohm source resistor the drain resistor value to bias close to 0v just happened to be 8.5k. I think I can choose a standard resistor value close to this value without significant change to the bias.

The drain should ideally be biased at half the supply voltage to allow as greater swing as possible. In practise it doesn't have to be exact, it just needs to be far enough from either of the supply rails to avoid clipping. For example if the drain is biased at 2V, the negative cycles will clip when the peak voltage exceeds 2V.

"4.332mA through Q1 seems too high"
maybe i'm measuring the current incorrectly. I'm measuring from Q1 drain to ground, is this correct. current measured is 4.322mA (18.5v at drain) which is close to the Idss value I have measured for the Fet.


How can the drain current be 4.3mA? If it is the drain voltage will be 36-4.2*8.5 = 0.3V.

Q4 shouldn't make any difference because the base current will only be about 6.3

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I thought you calculated current by the following:
(I = Current/V=Voltage/R(t)=Resistance Total)
I = V / R(t)
I = 36/(8.5 + .060)
I = 36/8.56
I = 4.2(mA)
this is close to the value i'm measuring in the simulation also, so now i'm really confused.

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I thought you calculated current by the following:
(I = Current/V=Voltage/R(t)=Resistance Total)
I = V / R(t)
I = 36/(8.5 + .060)
I = 36/8.56
I = 4.2(mA)
this is close to the value i'm measuring in the simulation also, so now i'm really confused.

Where did you get 0.06 from?

I assume, it's the value of R3.

You haven't included the voltage between Q1's drain and source in your calculation.

The current through Q1 is dependant on the gate-source voltage, the lower the gate voltage (relative to the source) the lower the current. The value of 4.2mA is the typical value assuming a gate voltage of 0V. Adding a source resistor will pull the gate voltage down below the source, therefore reducing the drain current.

I roughly estimated the current by looking at the datasheet and the value of R3.
http://www.synthdiy.com/files/2008/2sk117.pdf

With a gate voltage of -0.1V the drain current will be 1.5mA which would be the case if you used a 66.67Ω resistor for R3. As you've used a slightly lower value for R3, the current will be slightly higher. I guessed 1.6mA but maybe it'll be slightly less, the exact value isn't important as it will vary from transistor to transistor and as the temperature changes.

With a drain current of 1.6mA the drain voltage will be 36-8.5*1.6 = 22.4V

How are you simulating this?

What model are you using? Is it just a generic JFET?

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im simulating with multisim 10 with a specific 2sk117gr model, which are the ones I have.

some voltages of circuit in no signal condition
Q1
drain voltage is around 17.3V.
gate sits at 20.2mV
source 133mV

Q4
base 17.3V
collector 36v
emitter 16v

Q3
base 7.5v
collector 16v
emitter 6.81v

i've took a print screen of probe measurements from throughout the circuit. I wonder if the multimeter in multisim draws current? im using a probe this time and seem to be getting different values.

post-38176-14279144093392_thumb.png

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Good, the voltages and currents are within the expected ranges.

Q1's drain current is 2.2mA. a bit higher than I predicted but it's reasonable.

The drain voltage is 17.3V which is roughly equal to 36-2.21*8.5 and is perfect as it's nearly dead on half the supply voltage.

This means that your JFET stage should work perfectly.

The only problem is your output stage will burn out, as I said before the, current through Q4 and Q3 is far too high. The power dissipated by Q 4is 1.35W which exceeds its maximum rating of 625mW.

P = (36-16)*0.0675 = 1.35W
http://www.fairchildsemi.com/ds/MM%2FMMBT6427.pdf

It needs reducing to a much more sensible level, otherwise it will overheat.

As I said before, adding two silicon diodes between the Q3's base and 0V will reduce the current to around 6mA which is much more sensible: if this is too low to drive the load then increase the value of R5 to increase the current.

I'm still not sure you see my point about the circuit not requiring precision resistors. Try substituting the resistors for the nearest E24 values and you'll see that it makes very little difference to the circuit's characteristics: replace R3 with 62R and R1 with 8k2 and the circuit will still work just as well, it'll just be cheaper to make. Of course you should still use metal film resistors not carbon film, all I'm saying is that 5% tolerance is more than good enough.

The input is still DC coupled when it should really be AC coupled, especially if you're using a condenser mic. as the input impedance is really high you can use a small capacitor, I'd recommend a 1nF film capacitor. Don't use ceramic which can cause distortion and is piezoelectric which is microphonic.

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