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Designing DPLL with 555


klug

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Hi,
currently I tried to design a DPLL that use timer 555 as the vco. From what I read usually VCO will have a positive linearity(f(U)). But in my case(using timer 555) I got a negative linearity. What I mean here, when the voltage of control voltage increase the frequency output will be decreased.

So I want to ask: Is it still possible to use timer 555 as a VCO?

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Is it suitable to use in  PLL?

Usually in PLL, when there is phase error(reference input leading vco signal output) the PD develops a signal Ud which increase with time. This cause the VCO to increase its frequency.

With timer 555 when Ud increases the output frequency will be decreases. In  this case, can Timer 555 be used in PLL? I just don't get the idea.  Hope you can help me.

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I don't know why so many people continue to use obsolete components such as the 555 timer. The duty cycle also varies with the 555 so will not work with the phase comparator.

If you're building a PLL then use the 74HC4046 PLL IC which includes a VCO and phase comparator.
http://www.fairchildsemi.com/ds/MM/MM74HC4046.pdf

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Most PLL's are sinusoidal and their VCO's analog. A 555 timer is a logic device with a discharge transistor, level setting resistors, and a capacitor. It only produces a variable time pulse width.


I tried to do a DPLL which the signal is a square-pulse.
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I don't know why so many people continue to use obsolete components such as the 555 timer. The duty cycle also varies with the 555 so will not work with the phase comparator.

If you're building a PLL then use the 74HC4046 PLL IC which includes a VCO and phase comparator.
http://www.fairchildsemi.com/ds/MM/MM74HC4046.pdf


Thanks for the recommendation. But it's my lecturer's idea at the first place. My project is to construct a DPLL by using 555 timer as vco. The duty cycle is not a big deal because I can use a D-FF to make it 50%.
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If you don't have the 74Hc4046 the old CD4046 will work.

If you're not allowed to use the proper IC then it makes life a bit harder for you.

You could use an op-amp inverting amplifier to the input of the 555.

Can you use the CD4007? You can make a VCO with it.


I only allowed to use the 555 timer. But I think your suggestion of using inverting amplifier is a very good idea. Thanks for that. I'll tried. :)
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The CD4047 VCO schematic is missing a ground or Vdd compared to a typical square wave oscillator. Does it oscillate?

Klug, how are using the phase comparator? The control voltage pin of the 555 needs to be analog.

A simple analog phase comparator with a crystal generated sinewave input is common. The output of the 555 timer can be low pass filtered before being input to the phase comparator.
The feedback circuit needs to allow for amplitude adjustment and isolation of the 555 output.

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If you have a spare CD 40xx NOT/NAND/OR gate you can can use it as an inverting amplifier with a gain of 1 which will save an IC.


thanks for your suggestion. I'll tried it.


The CD4047 VCO schematic is missing a ground or Vdd compared to a typical square wave oscillator. Does it oscillate?

Klug, how are using the phase comparator? The control voltage pin of the 555 needs to be analog.

A simple analog phase comparator with a crystal generated sinewave input is common. The output of the 555 timer can be low pass filtered before being input to the phase comparator.
The feedback circuit needs to allow for amplitude adjustment and isolation of the 555 output.


I'll be using EXOR Gate for the phase comparator. And the signal from EXOR will be low pass filtered and be input to the control voltage pin of the 555. I'll try to simulate it first to see whether its work or not. But right now I'm quite busy with my school works. Maybe it will takes time. Hope it will working right.
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Yes. You might try using an inverter square wave oscillator as the other input to the XOR. It is a simple enough circuit to fine tune the DPLL. Or you may need a more stabile oscillator. The CD4007 square oscillator Hero99 posted is not a design I'm familiar with, though it may oscillate. The circuit I'm familiar with uses a biased series RC in parallel with the output inverter's input.

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