UART Communication Becomes Unstable Near Motor Driver Section

[eva_402]

Hi all,
I’m building a robotic platform where an STM32 communicates with another controller over UART. Communication is clean until the BLDC driver starts switching under load. Then I get framing errors and occasional packet loss.

The UART traces pass near the gate driver area on a 2-layer PCB.

Questions:

1. Is rerouting enough, or should I move to differential communication like RS485?
2. Would lowering baud rate significantly improve noise immunity?
3. For the next PCB revision, how much spacing should I keep between logic traces and high-current switching nodes?

 

[Harald Kapp]

The UART traces pass near the gate driver area on a 2-layer PCB.

Probably your main issue.

1. Is rerouting enough, or should I move to differential communication like RS485? --> Preferentially differential, especially when the com lines are getting long. This is possibly your best option.
2. Would lowering baud rate significantly improve noise immunity? --> Possibly, but without guarantee. A distorted signal stays distorted, even at a low baudrate.
3. For the next PCB revision, how much spacing should I keep between logic traces and high-current switching nodes? --> I doubt there are clear rules or equations for this. Provide as much clearance as you can afford. When using a multilayer pcb it may help to put the power nodes on one side of the pcb and the com nodes on the opposite side of the pcb, with layers of GND and VCC in between.

Here are few more tips:

1. Keep the com traces as short as possible.
2. Keep the com traces over a continuos GND plane. This provides the shortest path for return currents and minimizes the area of the loop between com signal and GND, thus minimizing the possible electromagnetic influence from other sources.
3. Provide a closed GND plane, if possible. Any cuts or interruptions in teh GND plane will force return curents to take a detour from the sink back to the source, thus making the signal susceptible to interference.
4. When using differential signals:
   - make sure there is a common GND connection between the driving end and the receiving end. It is a not uncommon misconception that a differential signal does not net a GND connection. Usually it does.
   - make sure the two traces for the differential signal are placed next to each other to minimize the area between the traces (again to minimize electromagnetic influence on the traces from other sources)
5. Ensure good signal integrity for the com signal(s). If there is overshoot or undershoot on the signal lines, add small series resistors at the driving end (Tx) to better match the driving impedance to the trace. You may have to try different values of resistance to optimize the signal integrity.

You can easily find more details on these tips online.

 

[bidrohini]

If you already see framing errors during BLDC switching ..... rerouting alone may help but is not a guaranteed fix.

If traces are short and you can keep them away from the switching node ..... rerouting & grounding improvements might be enough.
If they must stay anywhere near motor driver paths ...... RS485 (or another differential link) is the proper solution.

Lowering baud rate won't help much. Lower baud rate increases bit time .... easier for receiver to tolerate noise spikes ..... read this discussion: https://electronics.stackexchange.c...etween-bit-rate-and-baud-rate-and-its-origins

But:

It does NOT fix EMI coupling or ground bounce ..... I think it will make the system “more forgiving,” not robust. So it can be a quick mitigation, not a real fix.

About PCB spacing between logic and switching nodes .... read this guide: https://www.pcbway.com/blog/PCB_Man.../How_is_the_PCB_safety_spacing_designed_.html

For a 2-layer PCB in a BLDC environment:

Keep at least 5–10 mm separation as a practical minimum
Avoid running logic traces parallel to motor phase / gate drive traces
Do not cross switching loops underneath signal traces
Route UART on the quiet ground reference side of the board
Keep high di/dt loops (MOSFET, diode & capacitor paths) as tight as possible so EMI doesn’t spread

Ensure clean separation of power return currents and logic ground paths .... Use a solid ground plane where possible, but control current flow paths .... read this guide on grounding system: https://www.aivon.com/blog/pcb-manufacturing/how-to-design-an-efficient-pcb-grounding-system/