Arbitrary waveform generator with auto-calibration

  • Thread starter Matthieu Cattin
  • Start date
M

Matthieu Cattin

Jan 1, 1970
0
Hi all,

I'm designing an arbitrary wavefrom generator.
The requirments are : 100MSPS, +-10V or 0-10V
You can see my schematics here
http://ab-dep-co-ht.web.cern.ch/ab-dep-co-ht/temp/NEW_GFAS_TOP.SCH.1.pdf

These are my plan auto-calibration; FPGA gives a value to the DAC, then with
a feedback path to an ADC the FPGA reads back the analog output. After
comparison between the 2 values a corrections will be done numerically
inside the FPGA.

As I'm a begginer in this application field, I'd like to know if it is a
sensible way to do.
If somebody have already done some kind of DAC auto-calibration, all advices
and critical to my schematics are welcome.

Thanks
Matthieu
 
J

John Devereux

Jan 1, 1970
0
Matthieu Cattin said:
Hi all,

I'm designing an arbitrary wavefrom generator.
The requirments are : 100MSPS, +-10V or 0-10V
You can see my schematics here
http://ab-dep-co-ht.web.cern.ch/ab-dep-co-ht/temp/NEW_GFAS_TOP.SCH.1.pdf

These are my plan auto-calibration; FPGA gives a value to the DAC, then with
a feedback path to an ADC the FPGA reads back the analog output. After
comparison between the 2 values a corrections will be done numerically
inside the FPGA.

As I'm a begginer in this application field, I'd like to know if it is a
sensible way to do.
If somebody have already done some kind of DAC auto-calibration, all advices
and critical to my schematics are welcome.

Perhaps this is a stupid question, but is the ADC in fact more
accurate than the DAC?
 
N

Nico Coesel

Jan 1, 1970
0
Matthieu Cattin said:
Hi all,

I'm designing an arbitrary wavefrom generator.
The requirments are : 100MSPS, +-10V or 0-10V
You can see my schematics here
http://ab-dep-co-ht.web.cern.ch/ab-dep-co-ht/temp/NEW_GFAS_TOP.SCH.1.pdf

These are my plan auto-calibration; FPGA gives a value to the DAC, then with
a feedback path to an ADC the FPGA reads back the analog output. After
comparison between the 2 values a corrections will be done numerically
inside the FPGA.

As I'm a begginer in this application field, I'd like to know if it is a
sensible way to do.
If somebody have already done some kind of DAC auto-calibration, all advices
and critical to my schematics are welcome.

Why not use a precision voltage source for the DAC? An accuracy below
1% should be feasible.
 
M

Matthieu Cattin

Jan 1, 1970
0
Yes, the ADC is more accurate than the DAC.
 
M

Matthieu Cattin

Jan 1, 1970
0
But the problem is that I want to correct offset and gain error of the
output stage.
 
D

David L. Jones

Jan 1, 1970
0
Matthieu said:
But the problem is that I want to correct offset and gain error of the
output stage.

What is your spec?, can you make your output stage with precision
components and live with a small amount of error? 0.01% precision can
be had for a price.

Dave :)
 
D

David L. Jones

Jan 1, 1970
0
Matthieu said:
But I how do you manage DAC errors ?

If you want to match your ADC/DAC pair for range then gain error will
be your main problem. In which case try and use the same reference for
both ADC and DAC (if possible).

Offset error in the DAC will be around the same as your output
circuitry.

Remember you are only running just over 10 effective bits with your
14bit converter, so don't get too hung up on the errors.

Dave :)
 
A

Ancient_Hacker

Jan 1, 1970
0
Matthieu said:
Hi all,

I'm designing an arbitrary wavefrom generator.
The requirments are : 100MSPS, +-10V or 0-10V
You can see my schematics here
http://ab-dep-co-ht.web.cern.ch/ab-dep-co-ht/temp/NEW_GFAS_TOP.SCH.1.pdf

These are my plan auto-calibration; FPGA gives a value to the DAC, then with
a feedback path to an ADC the FPGA reads back the analog output. After
comparison between the 2 values a corrections will be done numerically
inside the FPGA.

You have there a 14-bit D/A, with built-in self-calibration, so you
must be wanting to reduce the errors in the following analog stages.

And there you have a HECK of a problem. I don't know of any op-amps
capable of 100MHz bandwidth and gain-flat to one part in 16,384 !!
Even with those hi-falootin THS3091's, they only settle to .1% in 40ns.


So you have a bit of a mismatch there-- the D/A has over ( 16 * 4 )
squared times the accuracy of your following stages. ANnd maybe square
that again if you include a feedback path. And no amount of digital
feedback is going to help these transient errors-- the horse has
already left the barn.

Maybe you better tell us exactly what kind of frequency response and
accuracy you really need.

Right now you're very far away from being able to use all the
capabilities of that D/A.

Regards,

A_H
 
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