PCI-X Backplane 2u?

[yy7d6]

Hi i am designing a board that will connect to a pci-x single board
computer directly (without backplanes) via PICMG 1.0 edge connector in
the sbc, problem is that IDSEL is not direcly available on the Card
Edge Pins, the PICMG 1.0 Specification tells that IDSEL1's must be
routed with AD31 for backplane slot 1, IDSEL2 with AD30 etc. right?
and btw, what does 2U in PCI-X Backplanes means?

Thanks.

 

[Paul Burke]

what does 2U in PCI-X Backplanes means?

No idea about PCI-X, but 2U is a height measurement of about 3.5 inches.

 

[Eeyore]

Hi i am designing a board that will connect to a pci-x single board
computer directly (without backplanes) via PICMG 1.0 edge connector in
the sbc, problem is that IDSEL is not direcly available on the Card
Edge Pins, the PICMG 1.0 Specification tells that IDSEL1's must be
routed with AD31 for backplane slot 1, IDSEL2 with AD30 etc. right?
and btw, what does 2U in PCI-X Backplanes means?

2U means 2 units of 19" rack equipment height. 3.5 inches.

Graham

 

[Ben Jackson]

problem is that IDSEL is not direcly available on the Card
Edge Pins, the PICMG 1.0 Specification tells that IDSEL1's must be
routed with AD31 for backplane slot 1, IDSEL2 with AD30 etc. right?

Normally during a command cycle all of the targets look at AD0..31 (or
up to 63 for 64 bit) to decide if the address falls within their mapped
space(s). However, if the command is config read or config write, then
it looks exclusively at IDSEL and AD0..1 to decide if it's selected.
Then, within the config space, only the lower address bits are used
because the config space is small. For that reason, many bridge
chipsets use AD16..31 as IDSEL lines, connecting them to the individual
slots. That's not required by the spec, it's just a common feature
of PCI bridge chipsets.