SMPS current transformer help (Part Two)

[Yzordderex]

This post is a continuation of the SMPS current transformer help post.
Thanks to all for your comments.

[email protected] (Paul Mathews) wrote in message
Paul, thanks for reply. A couple of questions.

This will be my first design using a resonant full-bridge topology -
I've got zero experience with this one - a total beginner. I'm
concerned/curious about the flux running away and other problems you
point out.

Now you've got me wondering if current mode control is the way I
should be going at all. The rf deck this thing is driving looks like
a constant 12 ohm impedance. I figured since the audio input signal
basically corresponds to a current command, current control is
probably best way to go. Is my logic failing me again?

I had thought early on that I might want to add a voltage sense
winding to the transformer, integrate the output, and add this signal
to the current sense feedback. I thought this might help keep the
flux centered about zero. I decided to just stick a small 5uf-10uf
polypropolyene cap in series with the primary and keep my fingers
crossed. What do you think about this?
I seem to recall a method of flux balancing that Unitrode had
described many years ago using a tertiary winding, but don't remember
the circuit specifics.

I would imagine it better to keep the primary inductance rather on the
high side in order to both slow the rate at which the magnetizing flux
can move around, and to keep the magnetizing current small relative to
the real current. This value would have to be negotiated with the
needs of the circuit as far as the value of commutating inductance is
concerned. I suspect that at the lower current levels (corresponding
to the negative portion of the audio input cycle) their may not be
enough current to commutate the pole and hard switching may result. I
do have the audio signal modulating the delay times in an effort to
reduce this problem.

As far as the bandwidth goes it just has to be high enough to pass
5kHz audio, 8kHz is the target - shooting for something better than
than the standard 3kHz voice communication bandwidth. The UCC3875
chip I'm using should have no problem with that. I think it has a
2MHz unity gain bandwidth.

Core I've got in the power stage now is a large high Mu toroid that my
boss uses for his EMI filters. I've got some large (I think) EF or
ETD 44 cores made of (I think) 3F3 material that I ordered just for
this project. (Cores are on my desk at work, and I am home.)

I don't understand your comment about ringing on primary. If primary
is resonant, shouldn't the voltage waveform be well defined? I've
just ordered some 150v shottkys which I figured would work very
nicely. I would think hard switching and the resultant reverse
recovery would be the concern. Turns ratio will probably be closer to
2:1 than 3:1 for 60v max output.

As far as gear goes, I have access to a new LeCroy 2GHz with current
and diff probes. Boss also has a new Agilent spectrum analyzer that
should come in handy when I get going on RF deck

Best regards to all,
Bob
N9NEO

 

[Paul Mathews]

OK, Bob. Re the secondary rectifier stress issue: Recall that, during
the Zero Voltage Switching phases, the Full Bridge
Phase-shift-controlled ZVS converter primary circuit consists of the
transformer primary, the resonant inductor in series (actually the sum
of leakage inductance and any
'padding' inductor you've included), and switching paths to close the
circuit. Due to energy stored in the inductance(s), the primary
current from the previous phase continues to flow in the primary.
Voltage across the inductances swings as required to maintain current
flow. Fortunately, the voltage across the switching elements will
soon swing through zero, allowing ZVS. However, the voltage across
the switching elements is the sum of the primary voltage and the
inductor voltage. You will find that the primary voltage can swing
quite high in the direction that puts a large reverse voltage across
the rectifiers. This shouldn't be any surprise. In most switchmode
designs, you work like hell to minimize leakage inductance because of
the various stresses it aggravates. In these ZVS designs, you
deliberately ADD to the inductance!
The last time the TI/Unitrode power supply gang blew through town, I
had a chat with Lazlo Balogh about this matter, and he basically
agreed that it was the dirty little secret about soft switching. Of
course, if you're putting together a switcher with a 3.3V output and a
really high turns ratio, a little extra reverse voltage might not be
much of a problem. But for me, designing audio power amps with 40V
rails and low turns ratios, it meant the difference between 100V
Schottky rectifiers versus 200V junction rectifiers ---> bigger
heatsinks and less efficiency.
Re current mode control: For your target bandwidth, you probably don't
have much choice, and CM has lots of advantages. You'll just have to
overcome the potential flux-walking problems. I had a look through my
ZVS folder of papers this morning, and I didn't immediately find the
particular paper I was looking for. However, here are a couple you'll
find useful and interesting:

US Patent 5,198,969 Soft-Switching Full-Bridge DC/DC Converting, Redl
& Balogh
http://www.co.it.pt/conftele2001/proc/pap136.pdf

The ref sections of the above will yield a good mix of related papers.

From what I know of your project, I'd look at something like this:

1) PFC Boost Stage, optimized for load regulation rather than power
factor. Output voltage ~400V regulated.

2) PWM modulator drives push-pull DCDC stage with capacitor in series
with primary. Cycle by cycle current limiting for soft-start and
component protection. No secondary feedback. In other words, a Class
D amplifier with no feedback.

The 'fidelity' such as you'll get, will come from the PFC stage
regulation and the choice of good quality DCDC stage components with
lots of margin rather than from feedback. You'll get the benefit of
good power factor, too, allowing you to draw full power from your
mains outlet.

Paul Mathews

 

[Yzordderex]

[email protected] (Paul Mathews) wrote in message
Thanks again Paul for response. I don't really understand about the
voltage stress on secondary rectifiers. It's probably one of those
things you have to see for yourself. I'm ok with figuring these
things out with scope. I see how the leakage inductance on primary
cannot drive the secondary of transformer to zero, but, if voltage on
one output diode anode is reverse then other diode anode must be
forward biased and so clamp. In any case no need to reply just yet.
Digi key order with output schottkys supposed to be here tomorrow.
I'll look for the problem, and thanks for the warning. I'll take sane
approach and use variac and load up slowly. I'll probably have more
questions after high power testing.

Little chance of topology change at this point in game. Control board
is stuffed, tested, and ready to go - sans schottkys for pulse
transformer drivers. Magnetics wound, and all but output rectifiers on
heatsink and wired. If I can't get this to work I'll have a slice of
humble pie and give ya a call

I did download paper describing commutating inductor to help the
passive pole resonate. Paper looks very interesting and lots of good
references. I didn't plow through it totally. Will get to tonight.

regards,
Bob