C
colin
- Jan 1, 1970
- 0
hi,
i need some tips on trying to design a gain control stage that has very
constant phase shift over a range of about 20db. at if of ~ 70khz with phase
variance of 1 ns preferably much less, or rf of 10-100mhz but needs to vary
less than 17ps.
the circuit uses a sa605 chip and its suposed to have "very low phase
variance over considerable range of input magnitude" however this is not
quite so, wich is somewhat disapointing, what i find is that as soon as the
first if stage starts to go into limit it introdeces an undesriable phase
change, presumably by distorting the signal wich is then skewed by the time
it comes out of the ac coupled filter. so i need to limit the input signal
to it, otherwise it performs well.
as i had not designed this part of the circuit block in i tried to make do
with using the rssi line to drive a fet wich reduced the suply voltage to
the input pre amplifier this works fine for amplitude but makes a phase lag
as it tries to reduce the signal, wich seems obvious now.
maybe a dual gate mosfet wld be better but i notice the input capacitance
varies considerably and most of the signal paths have relativly high
impedance becuase of the filters., and so wld cuase phase changes
particularly at the rf side.
the other idea was to use a fet as a variable resistor acros the signal
line controled by the rssi line and althogh this also control the magnitude
ok it introduces a considerable phase lead at higher signal levels. so i
tried the two together wich by the time i aded so many components all stuck
on the rfi suceptibility had gone to peices. although it did work to some
extent but was very fiddly indeed to get the two to cancel out to any
degree.
the third idea wich works best so far is to simply reduce the mixer signal
amplitude, is this a reasonable idea? again using a fet. of course the extra
components meant that the mixer frequency gets into parts of the circuit.
but the lower impedance of the clock divider meant that there was minimal
phase change. also any phase to this signal canceld itself out later on,
although the amplitude change might cuase a problem but if i split the
signal the phase difernce no longer cancels out.
i need to do a pcb relayout with this in, so if anyone has any ideas i would
apreciate them. the project uses phase change in a reflected modulated light
signal to measure distance, hence phase invariance is crucial.
the input uses a photodetector driving a bipolar low noise rf transistor (at
very low curent) i havnt decided if it wld be better to use a mosfet to get
lower noise, but although the photodetector has high impedance this is
swamped by the capacitance. i have had a hard time trying to estimate what
the equivalent noise currents/voltages are for bfg67 / bf998.
Colin.
i need some tips on trying to design a gain control stage that has very
constant phase shift over a range of about 20db. at if of ~ 70khz with phase
variance of 1 ns preferably much less, or rf of 10-100mhz but needs to vary
less than 17ps.
the circuit uses a sa605 chip and its suposed to have "very low phase
variance over considerable range of input magnitude" however this is not
quite so, wich is somewhat disapointing, what i find is that as soon as the
first if stage starts to go into limit it introdeces an undesriable phase
change, presumably by distorting the signal wich is then skewed by the time
it comes out of the ac coupled filter. so i need to limit the input signal
to it, otherwise it performs well.
as i had not designed this part of the circuit block in i tried to make do
with using the rssi line to drive a fet wich reduced the suply voltage to
the input pre amplifier this works fine for amplitude but makes a phase lag
as it tries to reduce the signal, wich seems obvious now.
maybe a dual gate mosfet wld be better but i notice the input capacitance
varies considerably and most of the signal paths have relativly high
impedance becuase of the filters., and so wld cuase phase changes
particularly at the rf side.
the other idea was to use a fet as a variable resistor acros the signal
line controled by the rssi line and althogh this also control the magnitude
ok it introduces a considerable phase lead at higher signal levels. so i
tried the two together wich by the time i aded so many components all stuck
on the rfi suceptibility had gone to peices. although it did work to some
extent but was very fiddly indeed to get the two to cancel out to any
degree.
the third idea wich works best so far is to simply reduce the mixer signal
amplitude, is this a reasonable idea? again using a fet. of course the extra
components meant that the mixer frequency gets into parts of the circuit.
but the lower impedance of the clock divider meant that there was minimal
phase change. also any phase to this signal canceld itself out later on,
although the amplitude change might cuase a problem but if i split the
signal the phase difernce no longer cancels out.
i need to do a pcb relayout with this in, so if anyone has any ideas i would
apreciate them. the project uses phase change in a reflected modulated light
signal to measure distance, hence phase invariance is crucial.
the input uses a photodetector driving a bipolar low noise rf transistor (at
very low curent) i havnt decided if it wld be better to use a mosfet to get
lower noise, but although the photodetector has high impedance this is
swamped by the capacitance. i have had a hard time trying to estimate what
the equivalent noise currents/voltages are for bfg67 / bf998.
Colin.
