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  1. K

    problem gain 741

    The output could be negative 4v depending on the design, or it may be negative 200mV depending on it's assembly with the current design.
  2. K

    FET Amplifier Biasing

    The -VGS biasing is similar to a DMOSFET and their input impedance is very high. So mistakenly, a JFET should replace MOSFET's and bipolar transistors in many instances. And aren't biploar transistors prefered in low frequency circuits with low supply voltages, making the use of MOSFET's even...
  3. K

    FET Amplifier Biasing

    Should JFET's be eliminated from circuit designs? If not, are there any examples of circuits with characteristics only obtained by using JFET's?
  4. K

    logic design

    Deciphering simple logic circuits is easier than designing simple logic circuits. Simple logic circuits are used to interface larger logic circuits. Larger logic circuits have to be designed mathematically and are excessively complicated.
  5. K

    FET Amplifier Biasing

    You might consider using a bipolar transistor based receiver input, which is more common. Selectivity and gain can limit the use of simple circuits. But several tuned circuits and amplifier stages can recover weak transmissions. Many of which utilize IC's.
  6. K

    Is it a hartely oscillator??

    The variable capacitor has to be a higher impedance than the series inductor so that the collector voltage is inverted compared to the base voltage. Unless the feedback capacitor and transistor base add to the phase shift, the amplitude is reduced by at least 75%.
  7. K

    Making Connections

    Solid copper wire solders good to component leads. High voltage on PCB's isn't good. Any sort of damage has to be evaulated for reuse.
  8. K

    Is it a hartely oscillator??

    Then C1 has a low impedance compared to the transistor input impedance? Where is the collector voltage compared to C1 input voltage?
  9. K

    Is it a hartely oscillator??

    The circuit layout can produce 270 degrees of feedback. Is C1 and the emitter resistor used for any of the phase lag, or is C1 just a coupling capacitor?
  10. K

    Is it a hartely oscillator??

    Is there any reason for the center-tapped inductor being standard to the Hartley Oscillator? Using two inductors should allow for a better design because this part of the circuit has less tolerance. Or is there a mathematical advantage to using the center-tapped inductor?
  11. K

    inverter

    So then a good inverter is two pulses followed by a simple filter? If there are many pulses used to comprise a single sine wave cycle, as I would assume the intention of the design to be, the negative transistions of the pulse will negate the positive transistions unless there were more than a...
  12. K

    inverter

    Could pulse postition modulation more accurately describe the circuit. The filter type circuit following the output transformer cannot be very simple and will reduce power transfer. A square wave will not be output by a transformer but for a short time of the voltage transistion. Also, the...
  13. K

    inverter

    Or pulse amplitude modulation. I doubt using circuit components after the output transformer because of the high voltage and power transfer problems. So the output of a good inverter is still only compatible with simple electronic loads.
  14. K

    inverter

    The simple schematic for a pure sine wave inverter has acceptable efficiency. It looks to be about 80%. The same basic circuit is used for a modified sine wave inverter. But there is no voltage output from the transformer most of the time. It would seem better to filter or clamp the output...
  15. K

    what is fermi level and....

    Fermi level and energy bands have to play small roles. Current value is regardless of valence bands or conduction bands or the energy required. The reason is because energy levels applied to conductors and semiconductors are very high. Electrons can move to any energy level with a change in...
  16. K

    MOSFETs with built in reverse current diodes

    The reverse diode, I'm guessing, could be an indication of polarity. In a DE MOSFET, 0 Vgs provides better conduction at the source than at the drain with the intended Vds polarity. An opposite polarity Vds apparently conducts better. Sometimes doped silicon pieces are used for electrical contacts.
  17. K

    problem gain 741

    Rg needs to be connected to a positive voltage. This is done with two series resistors connected to the +9v supply.
  18. K

    help ...to control pulse width of a -15vdc pulse train

    If the load is a high impedance FET, then it can be done more easily. If the load is low impedance, you should change the circuit which generates the pulse. Is the load a high impedance?
  19. K

    Designing DPLL with 555

    Yes. You might try using an inverter square wave oscillator as the other input to the XOR. It is a simple enough circuit to fine tune the DPLL. Or you may need a more stabile oscillator. The CD4007 square oscillator Hero99 posted is not a design I'm familiar with, though it may oscillate. The...
  20. K

    Designing DPLL with 555

    The CD4047 VCO schematic is missing a ground or Vdd compared to a typical square wave oscillator. Does it oscillate? Klug, how are using the phase comparator? The control voltage pin of the 555 needs to be analog. A simple analog phase comparator with a crystal generated sinewave input is...
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