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  1. R

    Capacitive reactance affecting voltage divider output

    Hi Thanks for this. Basically my friend has a piezo buzzer with three wires. When the piezo has been driven (he monitors the output) via the voltage divider into a PIC. Trying to differentiate if any wires may have broken off, or not connected. He says that he gets a different waveform when the...
  2. R

    Capacitive reactance affecting voltage divider output

    Hi all I apologise for the lack of information. It is all i was told so please do not get angry with me. If i could amswer a question on similar lines, forget the circuit (or lack of it above). If i had a potential divider (say 10K and 10K) and a capacitor connected to the top resistor. Again...
  3. R

    Capacitive reactance affecting voltage divider output

    The capacitors represent the capacitance of the feedback gnd and supply of the piezo. This is a friends diagram, thats all he has given me. I think there is a auto transformer to up the voltage to drive the piezo driven from a PIC. I was trying to help the only thing i thought of was the...
  4. R

    Capacitive reactance affecting voltage divider output

    Any suggestions would be appreciated. Sorry for the confusion.
  5. R

    Capacitive reactance affecting voltage divider output

    Hi Sorry for the confusion. The capacitor values are c1 30nF, c2 3nF and c3 220nF. The sounder is a piezo. Sorry yes, c1 and c2 are in parallel which combined are in series with c3. When the piezo sounds a voltage is available at the junction of potential divider. However, if i have a piezo...
  6. R

    Capacitive reactance affecting voltage divider output

    I really need the circuit to operate at 4KHz if i can. But may be able to drive off frequency as a last resort.
  7. R

    Capacitive reactance affecting voltage divider output

    Hi The capacitors are in series. Which total to 3.47nF. Please could you elaborate on frequency compensation. Are you saying to operate at a different frequency?
  8. R

    Capacitive reactance affecting voltage divider output

    Hi all I have attached a circuit diagram, which although not complete gives an idea to a issue i am having and trying to find a solution too. I have a sounder element with capacitance of C1 and C2. The total capacitance is 1/c1 + 1/c2 + 1/c3 This works out to 3.47nF. At 4KHz (resonant...
  9. R

    PiC micro I/O line states

    Hi Bob The PIC was damaged. Best regards Raj
  10. R

    Maximum voltage on PIC I/O line

    Hi all I wanted to ask what is the maximum negative and positive voltage i can apply to the PIC I/O line when configured as an input. I think it is VDD + 0.3V and VSS-0.3V The PIC has input protection diodes. So my question is can i go beyond these limits? Say i had 3.6V and -0.6V. Would the...
  11. R

    PiC micro I/O line states

    Hi The resistor values are 15K and 10K on the bottom side. The middle of these is connected to the PIC. The Top resistor is 15K and has a 1N4148 diode before it. A pulse waveform of 6.38V is input to the diode, 3KHz even mark to space but inly 2 pulse duration thst drives a piezo buzzer. The...
  12. R

    PiC micro I/O line states

    If it is an input all the time is there any way that the output can be driven high. I do not think it can. But i have narrowed it down as when i remove the bottom resistor of my voltage divider as an test, the current consumption falls to less than 2uA. I thought about input tri state but not...
  13. R

    PiC micro I/O line states

    Hi all. I have a voltage divider connected to a PIC I/O line. A pulse comes in at the top of the divider network, scaled downand fed into the PIC. I am inly detecting for a high to low edge usibg interrupts. This happens only once a day for 4ms then off. I am finding that i am getting a current...
  14. R

    PIC16F1939 High to low edge detection

    Hi Bob Thanks. Can i just detect a high to low edge. For example 1.5V at high. The edge does not fall to below 0.45V but goes to 0.9V. Is that possible? Just as an example. I always thought it should go above VIH and below VIL. Does this differ if there is a Interrupt on change? Thanks in...
  15. R

    PIC16F1939 High to low edge detection

    Hi A question to recognise a interrupt high to low am i correct in saying thst the transition of the signal must be above VIH and below VIL otherwise how can it be a jigh to low transition. Is that correct or am i missing something? Thanks in advance
  16. R

    PIC16F1939 High to low edge detection

    PORTB4, pin 25 of the microcontroller.
  17. R

    PIC16F1939 High to low edge detection

    Thanks for the replies I use 18F as it has USB functionality i.e. 18F4520 which i will be using later. Do i need to set up the schmitt trigger as the datasheet did state different characteristics for VIL and VIH? Or will it be schmitt trigger on default? Thanks in advance.
  18. R

    PIC16F1939 High to low edge detection

    Hi I am using a PIC16F1939 processor. I am using a I/O line as an input to detect a high to low transition then to generate an interrupt on PORTB. I am operating the PIC at 3V. Using a TTL buffer, I see the following information. Looking at the datasheet VIL is 0.15VDD and the conditions are...
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