555 timer

R

RKovach

Jan 1, 1970
0
I am trying to get an astable output of 4ms on, and 20ms off from a 555
timer. Is this possible? I have no problem getting the opposite times, 20ms
on and 4ms off. When I try to reverse the resistor values, the duty cycle is
50%. If I use a simple inverter circuit with a resistor and transistor at
the output, I get the output I need. The problem with this is, when the
timer stops, the output is V+, not ground.
 
A

Andrew Holme

Jan 1, 1970
0
RKovach said:
I am trying to get an astable output of 4ms on, and 20ms off from a
555 timer. Is this possible? I have no problem getting the opposite
times, 20ms on and 4ms off. When I try to reverse the resistor
values, the duty cycle is 50%. If I use a simple inverter circuit
with a resistor and transistor at the output, I get the output I
need. The problem with this is, when the timer stops, the output is
V+, not ground.

You can do this by connecting a diode: anode to pin 7, cathode to pin 6.
 
C

CFoley1064

Jan 1, 1970
0
Subject: Re: 555 timer
From: "Andrew Holme" [email protected]
Date: 10/30/2004 4:31 PM Central Daylight Time
Message-id: <[email protected]>


You can do this by connecting a diode: anode to pin 7, cathode to pin 6.

Like this (view in fixed font or M$ Notepad):

VCC VCC
+ +
| |
| o---.
.-. | |
| | .---o---o----.
R1| | | 8 4 |
'-' | |
| | |
| | |
.----o-----o7 3o------>
| | | 555 |
| .-. | |
D - | | | |
^ R2| | .--o6 |
| '-' | | |
| | | | |
'----o--o--o2 |
| | 1 5 |
C | '----o---o---'
--- | |
--- | NC
| |
=== ===
GND GND
created by Andy´s ASCII-Circuit v1.24.140803 Beta www.tech-chat.de

555 questions usually get a better response on sci.electronics.basics.

Good luck
Chris
 
A

Andrew Holme

Jan 1, 1970
0
CFoley1064 said:
Like this (view in fixed font or M$ Notepad):

VCC VCC
+ +
| |
| o---.
.-. | |
| | .---o---o----.
R1| | | 8 4 |
'-' | |
| | |
| | |
.----o-----o7 3o------>
| | | 555 |
| .-. | |
D - | | | |
^ R2| | .--o6 |
| '-' | | |
| | | | |
'----o--o--o2 |
| | 1 5 |
C | '----o---o---'
--- | |
--- | NC
| |
=== ===
GND GND

The diode should be the other way around.
 
M

Max Hauser

Jan 1, 1970
0
Argh! The Thing that Wouldn't Die. With full respect for H. Camenzind and
the others involved, and for its obvious commercial success, and for RKovach
who posed a reasonable question here, the enduring popularity of this
product (including among hobbyists) mystifies me, basis in a moment.

"RKovach" in news:[email protected]...
I am trying to get an astable output of 4ms on, and 20ms
off from a 555 timer. Is this possible?

I believe it is, others have offered details already. For the record though
this may not have the frequency stability or other properties needed by the
specific application, a decent astable oscillator with near-minimum
component count can always be made be putting a resistor from output to
input of a CMOS logic inverter or inverting gate of Schmitt, or hysteresis,
type, and then a capacitor from the logic input to ground (or to a power
supply). Asymmetrical duty cycles are available with additional components;
one way is to split the feedback resistor into two parallel paths, each with
a resistor and a diode, one in each direction; each resistor then controls
one charging ramp at the capacitor, and can be adjusted independently.

A negative feedback loop with a time-integrating element in series with a
hysteresis element is the basis of the classical first-order relaxation
oscillator, and is for instance an upshot in Henry M. Paynter's influential
article "Positive / Negative Feedback in Amplification and Control" which
appeared in multiple places in the 1960s including the publication _The
Lightning Empiricist_ of the George A. Philbrick company of Boston
(popularizers of the op-amp concept). This publication had an important
role in introducing some of the genuinely "analog" concepts now taken for
granted in electronics (and perhaps described today by young professors as
having origins lost in the mists of time).

Having also needed to make, like RKovach, RC relaxation oscillators over the
years I saw the 555 appear in (?) 1971 and first thought it was a great
idea, and in some ways still think so; the design had temperature stability,
conveniences, output driver. What kept me from using it much in practice
were very high DC power demand (from the point of view of applications not
needing high output drive) and a frustrating tendency, at least in early
versions, to parasitic oscillation of the unsought kind, which in turn
demanded careful wiring, sometimes extra capacitors, etc. These days, much
more recent monolithic timers or "silicon oscillators" are available, and
listed online, at low prices with much lower power, higher frequencies,
fewer external components, internally trimmed frequency accuracy, digital
control, etc. On the other hand, if one just needs a casual oscillator
there are still simpler and cheaper solutions, such as the one I outlined
above. It may be that (like Fairchild's 741 op-amp product whose popularity
Jim Roberge analyzed critically in his book _Operational Amplifiers_), the
perceived perfection or convenience of the 555 contributes to its endurance.

-- MH
 
J

Jim Thompson

Jan 1, 1970
0
Argh! The Thing that Wouldn't Die. With full respect for H. Camenzind and
the others involved, and for its obvious commercial success, and for RKovach
who posed a reasonable question here, the enduring popularity of this
product (including among hobbyists) mystifies me, basis in a moment.

"RKovach" in
I believe it is, others have offered details already. For the record though
this may not have the frequency stability or other properties needed by the
specific application, a decent astable oscillator with near-minimum
component count can always be made be putting a resistor from output to
input of a CMOS logic inverter or inverting gate of Schmitt, or hysteresis,
type, and then a capacitor from the logic input to ground (or to a power
supply).

NOT quite that simple. Stable/self-starting oscillators need 3
inverters... see CMOS*.pdf on the SED/Schematics page of my website.
Asymmetrical duty cycles are available with additional components;
one way is to split the feedback resistor into two parallel paths, each with
a resistor and a diode, one in each direction; each resistor then controls
one charging ramp at the capacitor, and can be adjusted independently.

Can be done also with the 555, just don't use the built-in discharge
path.

[snip]

...Jim Thompson
 
T

Terry Pinnell

Jan 1, 1970
0
RKovach said:
I am trying to get an astable output of 4ms on, and 20ms off from a 555
timer. Is this possible? I have no problem getting the opposite times, 20ms
on and 4ms off. When I try to reverse the resistor values, the duty cycle is
50%. If I use a simple inverter circuit with a resistor and transistor at
the output, I get the output I need. The problem with this is, when the
timer stops, the output is V+, not ground.

Here you go:
http://www.terrypin.dial.pipex.com/Images/AstableRKovach.gif
 
M

Max Hauser

Jan 1, 1970
0
Jim Thompson said:
NOT quite that simple. Stable/self-starting oscillators
need 3 inverters... see CMOS*.pdf on the SED/Schematics
page of my website.

With respect, Thompson: Yes, it _is_ quite that simple, at least in
context. (I have been using it for thirty years. Even you might be
surprised at what for.) Please take note of the specification of hysteretic
inverters, and the context of minimalistic alternatives to the original
SE/NE 555; frequency stability is not required. (See Paynter, 1967, for
further basis.) I think there is a theoretical possibility of a noiseless
knife-edge stable point in such oscillators but that, as the mathematicians
say, is a set of measure zero.

By the way, you are overdue to come to dinner. The London Observer /
Guardian has an article just out about a place you might like to try, near
me. I could bring some wine.

http://observer.guardian.co.uk/print/0,3858,5049765-110648,00.html

:) -- MH
 
J

Jim Thompson

Jan 1, 1970
0
With respect, Thompson: Yes, it _is_ quite that simple, at least in
context. (I have been using it for thirty years. Even you might be
surprised at what for.) Please take note of the specification of hysteretic
inverters, and the context of minimalistic alternatives to the original
SE/NE 555; frequency stability is not required. (See Paynter, 1967, for
further basis.) I think there is a theoretical possibility of a noiseless
knife-edge stable point in such oscillators but that, as the mathematicians
say, is a set of measure zero.

Hysteretic Inverters aren't frequency stable over temperature and
process corners, while 3-stage-inverter types and 555/comparator types
are (or can be, if _I_ design them :)
By the way, you are overdue to come to dinner. The London Observer /
Guardian has an article just out about a place you might like to try, near
me. I could bring some wine.

http://observer.guardian.co.uk/print/0,3858,5049765-110648,00.html

:) -- MH

Indeed! If only I can make some time... business is booming to the
point that I'm scarfing up money even on weekends ;-)

...Jim Thompson
 
K

Ken Smith

Jan 1, 1970
0
I am trying to get an astable output of 4ms on, and 20ms off from a 555
timer. Is this possible? I have no problem getting the opposite times, 20ms
on and 4ms off. When I try to reverse the resistor values, the duty cycle is
50%. If I use a simple inverter circuit with a resistor and transistor at
the output, I get the output I need. The problem with this is, when the
timer stops, the output is V+, not ground.



Ascii art:

R1
---!<-----/\/\/\------+
! R2 !
+--->!-----/\/\/\------+
! !
! ---------- !
+------! THR Q !----+-------
! ! !
+------! TRIG !
! ----------
---
--- C1
!
GND


R1 and C1 control how long the output remains high.
R2 and C1 control how long it remains low.
 
K

Ken Smith

Jan 1, 1970
0
I am trying to get an astable output of 4ms on, and 20ms off from a 555
timer. Is this possible? I have no problem getting the opposite times, 20ms
on and 4ms off. When I try to reverse the resistor values, the duty cycle is
50%. If I use a simple inverter circuit with a resistor and transistor at
the output, I get the output I need. The problem with this is, when the
timer stops, the output is V+, not ground.

Noone else has said it so I will have to:

"Use a PIC"

Actually this might be the sort of job that the SOT-23 pic would do well.
It has more than enough internals to get the timing almost exact.
 
J

Jim Thompson

Jan 1, 1970
0
I am trying to get an astable output of 4ms on, and 20ms off from a 555
timer. Is this possible? I have no problem getting the opposite times, 20ms
on and 4ms off. When I try to reverse the resistor values, the duty cycle is
50%. If I use a simple inverter circuit with a resistor and transistor at
the output, I get the output I need. The problem with this is, when the
timer stops, the output is V+, not ground.

See...

Newsgroups: alt.binaries.schematics.electronic
Subject: S.E.D Timer Question - LM555-Duty.pdf
Message-ID: <[email protected]>

...Jim Thompson
 
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