adaptive equalizers for LVDS data over CAT5

[Bob]

We could do that, but we still need the triggers to be unambiguous as
to which 400 MHz cycle they fire on. So if we did distribute something
slower, the edge rates would still need to be ballpark 1ns to make
sure we don't slip a cycle. Given the parts available nowadays, it
seems pretty simple to just pump 200 or 400 MHz around.

It's a more general issue of how well one can pump logic-level signals
around, between racks maybe, using cheap, available parts, with one
candidate being LVDS over Cat5 cables and connectors.

John

Presumably you have a plan to compenste for the propagation delay
in the cable/fibre?

Fifty feet of cable with 66% velocity factor gives a delay of about
75 nanoseconds which is about 30 cycles of 400MHz

Bob

 

[Robert Latest]

One economical way to do the interconnects would be to use LVDS signal
levels and CAT5 cabling. Long runs will be trashed by cable losses
(how long? gotta find out) but equalized receivers are available, and
some are automatic adaptive equalizers.

So what's an LVDS equalizer? The equivalent of what is called "AGC" in
audio - some kind of normalizer that brings the signal back to some useable
amplitude at the receiving end?

robert

 

[Martin Griffith]

So what's an LVDS equalizer? The equivalent of what is called "AGC" in
audio - some kind of normalizer that brings the signal back to some useable
amplitude at the receiving end?

robert

it also increases the HF gain see fig 4
http://www.gennum.com/video/pdf/52170DOC.pdf


Martin

 

[John Larkin]

So what's an LVDS equalizer? The equivalent of what is called "AGC" in
audio - some kind of normalizer that brings the signal back to some useable
amplitude at the receiving end?

LVDS sends digital data as a differential current, usually between
chips on boards, using differential pc traces, or between boxes, on
twisted pairs. The signals lose high-frequency components due to
transmission line lossses (skin and dielectric losses) and also suffer
dispersion, where different frequencies travel at different speeds.
Both soften up edges and smear bits into one another, with the
smearing being called ISI, intersymbol interferance. Since the process
is linear, in theory an equalizing network can undo the distortions.
Amplitude isn't the real problem, since the receiver is essentially a
comparator, and gain is cheap.

Some LVDS receiver chips include fixed equalization, like with four
pin-selectable steps, that is essentially high-frequency boost. Some
have adaptive equalizers whose algorithms are not well explained. I
doubt that the IC equalizers do much more than HF boost, so probably
don't fix dispersion very well.

Modems and such can have very sophisticated equalization, based on FIR
filtering, that fix all sorts of stuff, echoes even.

John

 

[Rene Tschaggelar]

We could do that, but we still need the triggers to be unambiguous as
to which 400 MHz cycle they fire on. So if we did distribute something
slower, the edge rates would still need to be ballpark 1ns to make
sure we don't slip a cycle. Given the parts available nowadays, it
seems pretty simple to just pump 200 or 400 MHz around.

It's a more general issue of how well one can pump logic-level signals
around, between racks maybe, using cheap, available parts, with one
candidate being LVDS over Cat5 cables and connectors.

John,
in order to have distributed strictly synchroneous
operation, I guess you'd need a master controller
and equal cable lengths to all units. Once you have
the cables equally long, you can take a 100EP196
to delay one signal against the other. Then feed
two channels, one arbitrarily delayed onto a mixer
and adjust until the integral is zero. This way
you can adjust the timeing to subnanosecond precision.

Rene

 

[Robert Latest]

John Larkin wrote:

[deleted stuff]

Thanks, John, for the detailed answer. I know little more about LVDS than
what can be inferred from expanding the acronym, but I'm following this
thread because I'm thinking about a serializer/deserializer application in a
"dirty" environment.

Right now it's a DOS PC with some old software and three full-size IDE
driver boards that output step/direction signals for eighteen stepper and
servo motors. The signals go into the power drive boxes via some ribbon
cables, from which lead 12 meters worth of power cables to the motors in a
camera robot.

I'd like to replace the ribbons by a SerDes combo via CAT5 and move the
power drives into the robot. Then it would only have to drag an AC power
cord and some cheap CAT5 cable across the studio rather than an arm-thick
bundle of heavy, unwieldy, expensive (and in many other ways bad) cables.

Max step frequency is only 250kHz, but I don't want to tap into some clock
on the boards, so I'm considering free-running the 36-bit SerDes at some
higher frequency like 2MHz. That's 72Mbit/s. Nothing compared to what these
things can do, but it's still some 20 meters in an electrically dirty
environment.

Except that I have no time at all to implement this shit, that's why I
haven't done any serious research about it. National's "LVDS owner's manual"
seems to be a pretty thorough source.

What's a recommended SerDes part combo? Slow, rugged, cheap, big (no BGA).
This would be pretty much an one-off, so I could design it around samples
from Maxim even.

 

[John Larkin]

John Larkin wrote:

[deleted stuff]

Thanks, John, for the detailed answer. I know little more about LVDS than
what can be inferred from expanding the acronym, but I'm following this
thread because I'm thinking about a serializer/deserializer application in a
"dirty" environment.

Right now it's a DOS PC with some old software and three full-size IDE
driver boards that output step/direction signals for eighteen stepper and
servo motors. The signals go into the power drive boxes via some ribbon
cables, from which lead 12 meters worth of power cables to the motors in a
camera robot.

I'd like to replace the ribbons by a SerDes combo via CAT5 and move the
power drives into the robot. Then it would only have to drag an AC power
cord and some cheap CAT5 cable across the studio rather than an arm-thick
bundle of heavy, unwieldy, expensive (and in many other ways bad) cables.

Max step frequency is only 250kHz, but I don't want to tap into some clock
on the boards, so I'm considering free-running the 36-bit SerDes at some
higher frequency like 2MHz. That's 72Mbit/s. Nothing compared to what these
things can do, but it's still some 20 meters in an electrically dirty
environment.

Except that I have no time at all to implement this shit, that's why I
haven't done any serious research about it. National's "LVDS owner's manual"
seems to be a pretty thorough source.

What's a recommended SerDes part combo? Slow, rugged, cheap, big (no BGA).
This would be pretty much an one-off, so I could design it around samples
from Maxim even.

That sounds like a good use for a serdes, but I haven't used any so I
can't suggest a part. We just work inside FPGAs, since we have them
anyhow. If you're driving motor coils, the occasional data error won't
matter, at the speeds these things run!

John