A
Adam S
- Jan 1, 1970
- 0
I'm looking for an "mixer" circuit to detect a sine waves DC to 10MHz,
3Vp-p max, and use IF output of 5kHz. Both the LO and the signal inputs
are generated by DDSs. If large harmonics are present on the LO then
there is good possibility they will mix with non-harmonic spurs
generated by the signal DDS. RF mixers are generally square wave LO
driven (or sine waves that fully switch long tail pair transistors) and
therefore will generate lots of harmonics. This is the reason an analog
multiplier is in my mind. LO 3rd harmonic of -40dB is low enough.
Currently manufactured multiplier ICs I have found:
AD835 (expensive, easy to use)
AD633 (cost ok, but only 1MHz)
HA2556 (price ?, difficult to buy)
I looked at a discrete design with total of 19 NPN transistors + 1
op-amp. (see schematic
http://members.optusnet.com.au/~eseychell/pictures/0001.png )
SPice simulation of perfectly matched transistors gives great
results on screen, but I'm very unsure what will happen in practice.
Voltage offsets at each input will cause carrier feedthrough, but these
can be trimmed out with yet more components. Neither power consumption
or supply voltages are a concern.
Apart from the high part count is there any major problems with going
for a discrete analog multiplier ?
3Vp-p max, and use IF output of 5kHz. Both the LO and the signal inputs
are generated by DDSs. If large harmonics are present on the LO then
there is good possibility they will mix with non-harmonic spurs
generated by the signal DDS. RF mixers are generally square wave LO
driven (or sine waves that fully switch long tail pair transistors) and
therefore will generate lots of harmonics. This is the reason an analog
multiplier is in my mind. LO 3rd harmonic of -40dB is low enough.
Currently manufactured multiplier ICs I have found:
AD835 (expensive, easy to use)
AD633 (cost ok, but only 1MHz)
HA2556 (price ?, difficult to buy)
I looked at a discrete design with total of 19 NPN transistors + 1
op-amp. (see schematic
http://members.optusnet.com.au/~eseychell/pictures/0001.png )
SPice simulation of perfectly matched transistors gives great
results on screen, but I'm very unsure what will happen in practice.
Voltage offsets at each input will cause carrier feedthrough, but these
can be trimmed out with yet more components. Neither power consumption
or supply voltages are a concern.
Apart from the high part count is there any major problems with going
for a discrete analog multiplier ?