Heart Beat Counter Circuit

jasen said:
I note you're not using a microcontroller, I'll assume there's a reason
for that.

some hints, look into using counters that can drive the display directly,
or maybe BCD counters and BCD-TO-7segent converter chips.

at the end of the 45 second period you need to send a reset pulse to the
counters. a R-C high-pass filter could be one way to do that.

Bye.
Jasen

Thanks for the input Jasen! So why do you say I should send a reset
pulse every 45 seconds? Wouldn't I want to do it every 60 seconds?
and...how would a high pass filter do the trick? Just have its cutoff
frequency at a 1/60 seconds?? I was thinking about sending a pulse
every 60 to the reset terminal using an astable multivibrator. Thoughts
on this?

Thanks again!

Rachel
 
L

Luhan

Jan 1, 1970
0
jasen said:
Chill! slow rate logic is good for teaching, you can debug it with a bunch
of LEDs.

Sure a micro coild solve this task with more accuracy and less hardware, but it
doesn't teach clocks, gates, counters, and latches.

Should you still be teaching clocks, gates, counter etc when they are
not used in applications like this assignment? Is this is history
class? That wont teach you how to use micro's and debug the code.
Unless lesson assignment #2 is to do the same project with a micro.

My apologies to the OP for not providing an answer appropriate to the
question, but I quit doing any hardware logic over 10 years ago.

Luhan
 
J

Jan Panteltje

Jan 1, 1970
0
My apologies to the OP for not providing an answer appropriate to the
question, but I quit doing any hardware logic over 10 years ago.

It is hardware logic all over again in FPGA these days.
Although it is the difficult route, I think Altera has the 7400
series as HDL modules.
 
L

Luhan

Jan 1, 1970
0
Jan said:
It is hardware logic all over again in FPGA these days.
Although it is the difficult route, I think Altera has the 7400
series as HDL modules.

My error. I went from hardware logic design to 8080/Z80/68000/8748/PIC
but never made the jump to FPGA. (still have not personally had any
need for them).

Luhan
 
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Jan Panteltje

Jan 1, 1970
0
My error. I went from hardware logic design to 8080/Z80/68000/8748/PIC
but never made the jump to FPGA. (still have not personally had any
need for them).

Luhan

There are a few things where FPGA makes sense, speed is one of these.
The other thing is that you can do things in parallel.
The third is perhaps the incredible amount of IO pins and standards
supported.
The drawback is price, and the incredible amount of IO pins :)
(that then translate to ballgrid packages).
There are more thing of course.
Yes I went the same path, but left out the 68000, did other processors,
but still have a 68000 laying about somewhere :)
 
J

John Fields

Jan 1, 1970
0
Cool. I just sent you an email with my current-state schematics. Thanks
for the description of the multiply by 4 hint- I totally get it now. I
also think that I understand theoretically how this could work now, but
still dont get how the BDC and the counter would actually fit into the
circuit? Just to clarify, is the counter just a series of JK flip
flops? Hmm...

---
Yeah. JK's or D's, but they're wired to output a pulse when they
overflow from 9 to 0 if they're counting up, and that pulse can be
used in a variety of ways to get the next counter upstream to
increment. Or for other stuff.

I found a neat way to do the multiply-by-four and I'll email you a
copy of the schematic as well as post it to abse with your
schematics so those interested can see it as well.

It'll be an hour or so...
 
R

Rich Grise

Jan 1, 1970
0
I am in DESPERATE need of some advice here. I am working on a project
for my basic electronics design class. Here is what I need to do...

Design a heartrate counter that
-uses 2 electrodes as the signal source, removes high frequency noise
- counts pulses for 15 seconds every minute
- displays the per minute heart rate for 45 seconds on a three-digit
digital display
- reset the count every 60 seconds and restart the counter

So far, I've got a heart rate pulse going into the counter for 15
seconds every minute. For the other 45 seconds of the minute, nothing
feeds into the counter. (This was done using filters, a comparator, a
15 second astable multivibrator, 2 bit counter, nor gate, and an and
gate)

So right now I need to figure out how to:
- reset the counter every 60 seconds
- connect the counter up to a three-digit digital display

I would be SO GREATFUL if someone could help me out with the counter
reset and display portion of this-

I once worked with a system that used digital filters to recognize a
QRS, and just counted microseconds from one to the next and divided
(to go from rep time to rep rate; scaled, of course. :) )

I think they kept a running average, so the rate didn't change
abruptly if there was variation in the time from one beat to the
next. Even with that, the display was more like real-time than
what you're suggesting.

However, if you're locked in, here are a couple of answers:

To reset the counter, you just need a timer/counter that issues a
"reset" pulse every 60 seconds.

To connect the counter to a display, you need a binary/BCD converter,
and 7-segment decoder/drivers, and the displays.

Good Luck!
Rich
 
J

jasen

Jan 1, 1970
0
jasen wrote:
Thanks for the input Jasen! So why do you say I should send a reset
pulse every 45 seconds? Wouldn't I want to do it every 60 seconds?
and...how would a high pass filter do the trick? Just have its cutoff
frequency at a 1/60 seconds?? I was thinking about sending a pulse
every 60 to the reset terminal using an astable multivibrator. Thoughts
on this?

I meant the 45 that comes after the 15, that'd work.


I can't say for sure but I suspect there's marks given for meating the
specification exactly, so if you add features not in the specification
(like background counting) you'd better make them switchable.

the multiply by four can be done using a monostable that turns on an
astable long enough to let 4 pulses out.

Bye.
Jasen
 
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