help with foldback current limit

[barney]

hello
i'm not an engineer
have limited resources
want to replace a pair of 6082 (not cheap) tubes in a receiver
with plug ss unit

how do you calculate the values for R6,R7 and R8
figured(guessed) Imax @ 250ma and I short limit @ 125ma

Q1 irf840
+240 o-----+---+----- D S --+-- R8 ---+-----+----+--o +180V +-5V
| | G | | | | 200mA
R5 | | R7 | _|_+ |
| '-- R6-- | ----+ | --- |
| | | | | R for min
+-----R------+ B Q2 | gnd | load
| +---C E-------+ |
| '-----|<|-------' |
| 12V zener gnd
-----------
| 4 * 60V |
| 5w zener|
-----------
|
|
gnd


the curcuit is based on several found on internet and in
sci.electronics.design thread "Linear regulated 150V supply"

any help very much appreciated
thanks,
barney

 

[barney]

OOPS -- that s/b 3*60v zener

how do you calculate the values for R6,R7 and R8
figured Imax @ 250ma and I short limit @ 125ma

Q1 irf840
+240 o-----+---+----- D S --+-- R8 ---+-----+----+--o +180V +-5V
| | G | | | | 200mA
R5 | | R7 | _|_+ |
| '-- R6-- | ----+ | --- |
| | | | | R for min
+-----R------+ B Q2 | gnd | load
| +---C E-------+ |
| '-----|<|-------' |
| 12V zener gnd

 

[Fred Bloggs]

how do you calculate the values for R6,R7 and R8
figured Imax @ 250ma and I short limit @ 125ma

Q1 irf840
+240 o-----+---+----- D S --+-- R8 ---+-----+----+--o +180V +-5V
| | G | | | | 200mA
R5 | | R7 | _|_+ |
| '-- R6-- | ----+ | --- |
| | | | | R for min
+-----R------+ B Q2 | gnd | load
| +---C E-------+ |
| '-----|<|-------' |
| 12V zener gnd

View in a fixed-width font such as Courier.


--I-->
irf840
Q1 Vs 6.2 1/2W Vo
+240 o-----+--------- D S --+-- R8 ---+-----+----+--o +180V +-5V
| G | | | | 200mA
R5 | R7 220 | _|_+ |
| .---|-----+ | --- |
| | | | | | R for min
| 100K | | B Q2 | gnd | load
+--R---------+---C E-------+ |
| | '-----|<|-------' |
| | 12V zener gnd
----------- |
| 3 * 60V | R6 47K
| 5w zener| |
----------- |
| |
| | R7
gnd gnd - I*R8* -------
R6 + R7



R7
Vbe,Q2= I*R8 - Vs* ------- and since Vs=Vo+I*R8
R6 + R7


R6 R7
Vbe,Q2=I*R8*------- - Vo*-------
R6 + R7 R6 + R7


R7 R6+R7
or I= Vo*------- + Vbe*---------
R8*R6 R8*R6


Then the conditions are that I=250mA Vo=180 and Vbe,Q2=0.6V

and I=125mA Vo=0 Vbe=0.75V

| R7 |
| ------ |
|0.250 | |180 0.6 | | R8*R6 |
| | = | | x | |
|0.125 | |0 0.75| | R6+R7 |
| ------ |
| R8*R6 |



R7 0.25*0.75-0.6*0.125
------ = ------------------ = 0.0008333
R8*R6 180*0.75


R6+R7 180*0.125-0.250*0
------ = ------------------ = 0.1666667
R8*R6 180*0.75



=> R7 0.0008333
------- = --------- =0.005
R6 + R7 0.1666667


R6
making ------- =0.995
R6 + R7

1
and R8= --------------- = 6.2 Ohms
0.1666667*0.995

1
and R6 and R7 are chosen in ratio R7/R6= ----- - 1 = 0.005
0.995


R7= 220 and R6=47K are two close standard values.


Back checking:

R7 R6+R7
At Vbe,Q2=0.6V Vo=180 then from I= Vo*------- + Vbe*-------
R8*R6 R8*R6

220 47.22K
I=180* ------ + 0.6* ------ = 233mA
6.2*47K 6.2*47K



and at Vo=0 and Vbe=0.75

47.22K
Isc= 0.75 * ------- = 120mA
6.2*47K


You will want to make R ~ 100K and 1W


The quiescent overhead due to R6+R7 is 180/47K=4mA

 

[barney]

THANK YOU FRED for the very indepth analysis

i've seen R6 tied to ground in lv regulators
the 2 hi voltage regulators
had R6 tied back to Q1 drain
thought that's the way it should be done
what is the reason for tying back to Q1 drain?

during power-up is there a chance of going into
current limit under normal operating conditions?

thanks for the help,
barney

 

[Fred Bloggs]

i've seen R6 tied to ground in lv regulators the 2 hi voltage
regulators had R6 tied back to Q1 drain thought that's the way it
should be done what is the reason for tying back to Q1 drain?

By tying R6 to the drain, the foldback trip point now becomes a function
of Vin-Vo, where Vin is the unregulated 240V, and this makes the trip
point a function of the power dissipation in the MOSFET. The ground
referenced R6 circuit assumes that power dissipation has been accounted
for in setting the trip point limits and does not adapt as Vin varies.
The drain referenced R6 circuit varies the trip point was Vin varies so
that power dissipation influences the trip point. You can compute
the new R6,7,8 values using the same equations by substituting -(Vin-Vo)
for Vo. This puts -60V and -240V in the array in place of 180V and 0V
respectively. The new circuit becomes R8=1.8, R6=110K, and R7=220 like so:
View in a fixed-width font such as Courier.


--I-->
irf840
Q1 Vs 1.8 1/4W Vo
+240 o-----+----+---- D S --+-- R8 ---+-----+----+--o +180V +-5V
| | G | | | | 200mA
R5 | 110K | R7 220 | _|_+ |
| '-- R6--|-----+ | --- |
| 1W | | | | R for min
| 100K | B Q2 | gnd | load
+--R---------+---C E-------+ |
| 1W '-----|<|-------' |
| 12V zener gnd
-----------
| 3 * 60V | 47K
| 5w zener|
-----------
|
|
gnd

The new trip point is now 250mA at Vo=180V and Vin=240V nominal, for a
MOSFET dissipation of 0.25*60=15W. If Vin rises to 260V, the trip point
is lowered to 227mA for a dissipation of 18W; and if Vin falls to 220V,
the trip point is raised to 270mA for a power dissipation of 9W. The
corresponding power dissipations for the gnd referenced R6 circuit are
14W nominal, 18W, and 9W- derived from a constant 225mA trip point.

during power-up is there a chance of going into current limit under
normal operating conditions?

Yes- the foldback can take over if the 240V comes up faster than the
MOSFET can charge the output filter capacitor. As the capacitor charges,
Vo increases and the foldback will allow more current, until the circuit
comes out of foldback and reaches Vo~180V.

If you use SPICE then you can obtain a plot of the foldback
characteristic by using DC Analysis on the circuit shown below. Run Vsrc
from 1 to 185V and plot the current in the VCCS as a function of Vsrc.
The OA is the ideal OpAmp.

View in a fixed-width font such as Courier.

..
..
..
.. --I-->
.. irf840
.. +240 Q1 Vs 1.8 1/4W Vo
.. o-----+----+---- D S --+-- R8 ---+--+--------------+
.. | | G | | | |
.. R5 | 110K | R7 220 | | |
.. | '-- R6--|-----+ | | |
.. | 1W | | | | |
.. | 100K | B Q2 | | |
.. +--R---------+---C E-------+ | |
.. | 1W '-----|<|-------' | |
.. | 12V zener | |
.. ----------- | - VCCS +--+
.. | 3 * 60V | 47K '---|\ || |
.. | 5w zener| | >------>|| |
.. ----------- .---|/ |\/|
.. | | + OA +--+
.. | | |
.. gnd Vsrc --- |
.. - gnd
.. |
.. |
.. gnd
..
..

 

[barney]

hi fred
thank you again for the explanation
i can see the difference in fix and changing limit

want to make sure i haven't missed anything
in your first post
lower righthand corner of the schematic:
R7
- I*R8 * -----
R6+R7
does this belong to?

R7 0.0008333
there is >= in front of ----- = --------- = .005
R6+R7 0.1666667
is something missing here?

again thanks for all the help,
barney

 

[Fred Bloggs]

hi fred
thank you again for the explanation
i can see the difference in fix and changing limit

want to make sure i haven't missed anything
in your first post
lower righthand corner of the schematic:
R7
- I*R8 * -----
R6+R7
does this belong to?

Nothing- it is something I should have erased after cutting and pasting
character blocks around.

R7 0.0008333
there is >= in front of ----- = --------- = .005
R6+R7 0.1666667
is something missing here?

That should be '=>', an arrow- which means "leads to" or "rearranges to"
or "is equivalent to" etc..

More information on those two circuits is that the drain referenced R6
circuit will start up with much more current than the gnd referenced R6
circuit. The drain referenced short circuit limit is 300mA at low
voltages and tapers down to 180mA at Vin=180V for a Pd,max=32W. The gnd
referenced R6 circuit will short circuit limit at 100mA at low voltage
rising to maybe 110mA at Vin=180. The max Pd is Vin,max*110mA which is
not too far removed from 32W for heat sinking purposes. If you have some
kind of troublesome nonlinear load that causes the foldback to stay on
with the output at somewhat less than full voltage, then you would want
to use the drain referenced circuit with a 32W heatsink for protection
against turning on into a dead short. This is one advantage it has over
the fixed limit gnd referenced R6 circuit.

 

[Fred Bloggs]

If you use SPICE then you can obtain a plot of the foldback
characteristic by using DC Analysis on the circuit shown below. Run Vsrc
from 1 to 185V and plot the current in the VCCS as a function of Vsrc.
The OA is the ideal OpAmp.

I suppose this circuit is spiffier:

View in a fixed-width font such as Courier.


..
.. SPICE FOLDBACK CHARACTERISTIC PLOT
..
.. --I-->
.. irf840
.. +240 Q1 Vs 1.8 1/4W Vo
.. o-----+----+---- D S --+-- R8 ---+--+--------.
.. | | G | | | |
.. R5 | 110K | R7 220 | | |
.. | '-- R6--|-----+ | | |
.. | 1W | | | | +-------+
.. | 100K | B Q2 | | |AMMETER|
.. +--R---------+---C E-------+ | +-------+
.. | 1W '-----|<|-------' | |
.. | 12V zener | - |
.. ----------- '---|\ |
.. | 3 * 60V | | >--'
.. | 5w zener| .---|/
.. ----------- Vsrc| + IDEAL OA
.. | ---
.. | -
.. gnd |
.. |
.. gnd
..
.. |
.. A 250m+ - - / | <- I
.. M | / | trip
.. M | / |
.. E | / |
.. T | / |
.. E | / |
.. R 120m+/ | <- I
.. | | sc
.. +--------+----
.. 0 180
..
.. Vsrc ->
..

 

[barney]

hi fred

that helps
pretty sure the the load is linear
i going with the ground referenced R6

turn-on into dead or ?? anything can
happen the radio is over 50 30+ tube set
with the ss regulator 5 tubes eleminated
along with the heat


do you see any problems here
want to force equal voltage
drop across Q1 and Q2

Q1 Q2
vin --+--- D S --+-- D S --+-- vo
| G | G |
| | | | |
| +-|<|-' +-|<|-'
| | zener | zener
| R R
| | |
'--R1--+----R1-----+
| |
| + R2
--- |
--- |
| gnd
|
gnd


thanks for all the info and help,
barney

 

[Winfield Hill]

barney wrote...

do you see any problems here
want to force equal voltage
drop across Q1 and Q2

Q1 Q2
vin --+--- D S --+-- D S --+-- vo
| G | G |
| | | | |
| +-|<|-' +-|<|-'
| | zener | zener
| R R
| | |
'--R1--+----R1-----+
| |
| + R2
--- |
--- |
| gnd
|
gnd

R2 should be returned to vo, not gnd. Watch out for
the minimum-load requirement due to R2's current.

 

[barney]

hi win
i've re-drawn the the schematic
changed some the references
i assume this is what you mean
a more less realworld example
will help my understanding
how do i calculate R1-R4?


Q1,Q2 vds 40v
irf840s
300v Q1 Q2
vin --+--- D S --+-- D S --+----+-- vo 220v
| G | G | |
| | | | | |
| +-|<|-' +-|<|-' |
| | zener | zener |
| R R |
| | | |
'--R1--+----R2-----+----R3----+
| |
| + R4 min load
--- |
--- |
| gnd
|
gnd

thanks,
barney

 

[Winfield Hill]

barney wrote...

hi win
i've re-drawn the the schematic, changed some
the references. i assume this is what you mean,
a more less realworld example will help my
understanding. how do i calculate R1-R4?

Q1,Q2 vds 40v
irf840s
300v Q1 Q2
vin --+--- D S --+-- D S --+----+-- vo 220v
| G | G | |
| | | | | |
| +-|<|-' +-|<|-' |
| | zener | zener |
| R R |
| | | |
'--R1--+----R2-----+----R3----+
| |
| + R4 min load
--- |
--- |
| gnd
|
gnd

I don't know what you're aiming at, but for series FETs
the top one wants to sit at half the total i/o difference
voltage and you control the bottom one, like this...

.. irf840s
.. 300v Q1 Q2
.. vin --+--- D S --+-- D S --+-----+---+--- vo 220v
.. | G | G | | |
.. | | | | | | min
.. | +-|<|-' +-|<|-' | load
.. | | zener | zener | |
.. | | | | gnd
.. '--R1--+----R2-----+- control -'
.. circuit

Actually, for a measly 300V, just use one higher-voltage FET.
But there are legitimate places to use series-stacked FETs.

Last month I designed a 2500V push-pull linear amplifier using
three stacked 1kV FETs for pullup and three more for pulldown,
with a nice class-A bias controller that swings over the whole
2500V range. It's a low-speed precision amplifier with four per
PCB, and it dissipates only 0.8W from the 2.5kV power supplies.

They're making 100 of them for an experiment, 25 PCB cards, and
I thought they'd all be in one box, so I designed a starved 150mW
version, 15W being all the heat I wanted to create inside a closed
box. But after learning they'd be mounted in multiple boxes, I
squandered the power, raising the class-A consumption to 820mW.
Next week I'll get the prototype PCBs and we'll see how it works.

 

[barney]

hi win
thanks for the info
the idea was to spead power dissipation
between the 2
there's 1 condition that over 30w
would be dissipated by a single fet
thanks,
barney