[manish_sharma_89]

I am working on a DIY 300 W audio power amplifier (A300) based on a complementary VAS architecture with a differential input stage, complementary VAS, bias/driver stage, and multiple parallel output transistors (NJW0281G/NJW0302G).

The amplifier works correctly in LTspice simulation. With the intended ±75 V supply, the simulated quiescent current is only around 10–11 mA.

However, during initial real-world testing at reduced supply voltage, I am getting a very high DC current draw:

I have used a transformer of 66 0 66 then i have a power supply

• 6 V → approximately ±5 V rails, but about 2.2 A DC
• 12 V → approximately ±7 V rails, but about 5 A DC
• Expected from simulation at these conditions: approximately ±8.5 V / 10 mA and ±17 V / 11 mA, respectively.

The output transistors and other devices heat up very quickly even at this low supply voltage. The power supply and transformer appear to be capable of supplying the current, but the amplifier itself is drawing far more current than expected.

I have checked the schematic against the simulation and am currently investigating the bias voltage, transistor pinouts/orientation, driver/output-stage wiring, emitter resistors, grounding, compensation, layout design rules.

One question I would particularly appreciate help with is: what are the most likely causes of several amps of quiescent current in a complementary-VAS amplifier when the simulation shows only ~10 mA? Also, what measurements would you recommend making first to isolate whether the problem is in the bias/driver stage or the output stage?

For more reference i can send the schematic as well which is working well in simulation in lt spice.

 

[crutschow]

Sounds like the bias voltages are off.
Post the schematic here if you want more help.

 

[Martaine2005]

Measure the voltage drop across the emitter resistors. Should be very low, for example 10mV.

 

[musiklab]

post schematic , & LT sim , complete, please

 

[AnalogKid]

The sim results are based on perfect components that are perfectly matched. The real world has neither.

ak

 

[rainyliveshere]

I am working on a DIY 300 W audio power amplifier (A300) based on a complementary VAS architecture with a differential input stage, complementary VAS, bias/driver stage, and multiple parallel output transistors (NJW0281G/NJW0302G).

The amplifier works correctly in LTspice simulation. With the intended ±75 V supply, the simulated quiescent current is only around 10–11 mA.

However, during initial real-world testing at reduced supply voltage, I am getting a very high DC current draw:

I have used a transformer of 66 0 66 then i have a power supply

• 6 V → approximately ±5 V rails, but about 2.2 A DC
• 12 V → approximately ±7 V rails, but about 5 A DC
• Expected from simulation at these conditions: approximately ±8.5 V / 10 mA and ±17 V / 11 mA, respectively.

The output transistors and other devices heat up very quickly even at this low supply voltage. The power supply and transformer appear to be capable of supplying the current, but the amplifier itself is drawing far more current than expected.

I have checked the schematic against the simulation and am currently investigating the bias voltage, transistor pinouts/orientation, driver/output-stage wiring, emitter resistors, grounding, compensation, layout design rules.

One question I would particularly appreciate help with is: what are the most likely causes of several amps of quiescent current in a complementary-VAS amplifier when the simulation shows only ~10 mA? Also, what measurements would you recommend making first to isolate whether the problem is in the bias/driver stage or the output stage?

For more reference i can send the schematic as well which is working well in simulation in lt spice.

Check the actual datasheets for the NJW0281G, NJW0302G, and every driver transistor. Confirm the base, collector, and emitter connections against the physical package orientation. Do not assume complementary devices have identical pin arrangements.

 

[musiklab]

HI Manish,
After waiting about a month for you to upload the schematic and simulation , as you offered and I and others requested ,
I have no more time for you.

 

[rainyliveshere]

Test using a current-limited bench supply. Remove the output transistors before initial testing. Then measure current through both supply rails. Check the VBE multiplier and driver bias voltage. Cross check every transistor's pinout against its datasheet. Verify NJW0281G and NJW0302G connections. Measure voltage across every emitter resistor. This quickly identifies excessive output-stage conduction.