inverter oscillator

[Kevin Weddle]

I built an inverter oscillator with two inverters connected by a capacitor and a pullup on the first inverter. The output of the second inverter is fed to the input of the first inverter. The problem I'm having is that it will only oscillate when I touch the side of the capacitor, which shortens the charge/discharge because of the path to ground from my finger. I tried to add a high resistance to ground, but I can't seem to find the correct value. Can anybody tell me why I need my finger resistance to get the thing oscillating.

 

[audioguru2]

Pullup?
Which inverters? CMOS? What power supply voltage?
We would like to help you but we don't know what you have.
Can you sketch it?

 

[MP1]

Kevin, a two gate oscillator is unstable. A three gate oscillator is more stable and will give you a better result. I have posted an application note about this in a thread about a radar detector project. You can find the link with a search. It is an interesting article regarding this subject. If you cannot find it, let me know and I will search.

MP

 

[audioguru2]

Kevin,
Why don't you use a stable and popular, 2 inverter "Classic CMOS Oscillator"? I described its operation in the other post, here:
http://www.electronics-lab.com/forum/index.php?board=15;action=display;threadid=883
R1 is optional since it makes the output frequency easier to calculate, and less variation with supply voltage changes.

Your "oscillator" seems to be 2 inverters connected in a positive-feedback loop, creating a latch. If your R1 pulls-up the input of Inv 1, then its low output connecting to Inv 2's input makes Inv 2's output high. Therefore your C1 has no voltage across it and the inverters stay that way, latched.
When you touch C1, your resistance brings down the input voltage of Inv 1, so that it becomes a linear high-gain amplifier, and the circuit either oscillates at a very high uncontrolled frequency, or just amplifies mains hum injected by your finger.

View attachment 35489

 

[MP1]

Kevin (and others),
Here I have attached the Application Note from Fairchild Semi which tells why the CMOS two inverter oscillator is unstable and how to build a better one. Please read it.

MP

AN-118.pdf

 

[audioguru2]

MP,
The Fairchild application note does NOT say that a CMOS two-inverter oscillator is unstable.
It simply says that a two-inverter oscillator will "fail to start" if its capacitor becomes disconnected. It says that the ONLY advantage of using a three-inverter oscillator is that it will oscillate (but at an extremely high frequency) if its capacitor becomes disconnected.
The app. note also says that if a CMOS oscillator is designed correctly (R, C and supply voltage not too small) then it (either two or three inverters) is fairly stable.
That is why the CMOS two-inverter oscillator is so popular and is a "classic".

 

[MP1]

The word unstable was my description. It states that if the capacitance becomes too small, it will fail to oscillate. You have misread when you state it can only fail when the oscillator is disconnected.
...but here is the section from page 3. Everyone can make their own assumption of stability.

MP

View attachment 35493

 

[audioguru2]

Right.
I had a standard CMOS 2-inverter oscillator running at 1.6MHz (4049 buffer or HC territory) using only a 27pF cap and a multi-turn trimpot to calibrate its frequency. It never failed and never varied more than 1 percent. That's stable!
They say that lower frequency CMOS oscillators are even more stable.

 

[Kevin Weddle]

The pullup is on the output of the first inverter. By the way, I stumbled upon the fix. I used a 10M resistor from the input of the second inverter to it's output. I would have thought that a resistor to ground on the input of the second inverter would work. But it seems that the complimetary voltage works better. I guess you can call this arrangement a fed back inverter.

 

[audioguru2]

Kevin,
Is this your circuit?
It doesn't need a pull-up resistor, especially not at an inverter's output. Inv 2 will self-bias itself near mid-supply, and in turn, will also bias Inv 1. So both inverters become high gain linear amplifiers, with positive feedback sustaining oscillation as the capacitor charges and discharges into the resistor.

View attachment 35494

 

[audioguru2]

When the last circuit is re-drawn, look at what it is.
It is a CMOS "classic" 2-inverter oscillator!

View attachment 35495

 

[Kevin Weddle]

Audioguru, thank you for describing my circuit. I used a pullup because the example in my book uses a pullup. The pullup is on the output of the first inverter. I did not happen to notice that I constructed a classic CMOS oscillator, though it appears to be. I have this clock hooked to a BCD counter. The BCD counter should actually be called a counter decoder because it has 10 ouputs for a clocked input. I would have preferred a regular counter fed to a decoder, but the BCD counter seems to fulfill this purpose.

 

[audioguru2]

Kevin,
You're welcome.
I'm glad that you understand the operation of this oscillator now.

 

[Kevin Weddle]

What I find amazing is how the transition will allow for the charging of the capacitor. The transition is of a certain duration. If I use a long time constant, I think that the transition is of a longer duration. This is how I get an oscillation at the low frequency.