this attach file is a new design of....please download it and help me .
please help me in simulation it and highlight the most important features of the design
Design and simulate a two stage CMOS operational amplifier shown in the Fig., for these
conditions:
DC Voltage Gain > 60dB
Unity Gain Bandwidth > 70MHz
Phase Margin > 50 degrees
Power Dissipation: as low as possible
Technology: 2µm
Power Supply: 3.3V
Load Capacitance: 2pF
Output Voltage Swing > 2Vp-p
Make a unity feedback buffer and check the settling time of the circuit when you inject
a step voltage to the input with rise and fall time of 1µs.
View attachment 41727
please help me in simulation it and highlight the most important features of the design
Design and simulate a two stage CMOS operational amplifier shown in the Fig., for these
conditions:
DC Voltage Gain > 60dB
Unity Gain Bandwidth > 70MHz
Phase Margin > 50 degrees
Power Dissipation: as low as possible
Technology: 2µm
Power Supply: 3.3V
Load Capacitance: 2pF
Output Voltage Swing > 2Vp-p
Make a unity feedback buffer and check the settling time of the circuit when you inject
a step voltage to the input with rise and fall time of 1µs.
View attachment 41727
