PROTEUS ERROR

[SOURAV@01]

I was just testing a 4 bit binary synchronous counter (74161 IC) fed into a decoder (74154 IC), but as the decoder provides inverted outputs , I further passed the decoder outputs through a custom IC (the rightmost IC in pink colour), which I made out of 16 NOT gates. However, it's not getting simulated and displaying some error. The circuitry along with the errors are attached . Please help me rectify the errors.

 

[DonaldCooper]

I was just testing a 4 bit binary synchronous counter (74161 IC) fed into a decoder (74154 IC), but as the decoder provides inverted outputs , I further passed the decoder outputs through a custom IC (the rightmost IC in pink colour), which I made out of 16 NOT gates. However, it's not getting simulated and displaying some error. The circuitry along with the errors are attached . Please help me rectify the errors.

The 74154 decoder outputs an active low signal, so you don't need to invert all 16 pins with a NOT gate. Instead, you can use a logic low level directly as the trigger condition, or invert only the pins that are really needed.

The simulation error is often due to an incorrect clock pulse, incorrect VCC/GND connection to TTL standard, or incorrect pin definition of the custom IC. Please check the power source, enable pin of the 74154 and the declaration of the custom IC.