decoder for 8051

[hevans1944]

For the mov instruction there is no need to arithmetic and logic unit . we can simply store data into respective registers
data can be directly store into memory or registers

So please do what was asked to demonstrate you understand how an instruction is assembled for the 8051 from an 8-bit op code, plus one or two byte operands (if needed).

Why not encode MOV R4, #5 and MOV R3, A, and MOV A, @R1?

See my complete post #57.

 

[hevans1944]

I will re-visit this thread next month to see if there has been any progress made.

 

[(*steve*)]

Sorry I'm not going to respond further.

(edit: either)

 

[vead]

Sorry I'm not going to respond further.

(edit: either)

you asked question Why not encode MOV R4, #5 and MOV R3, A, and MOV A, @R1?

I have given answer
data and address are available in registers that can be access by using register address
so thats why we don't encode MOV R4, #5 and MOV R3, A, and MOV A, @R1?
we can simply store data into respective registers

 

[KrisBlueNZ]

OK, I'm going to have another go.

I don't think you have grasped even the basics of how an MCU core executes code. I want to take one example case and go through the process that the core uses execute it, step by step, in detail, to see if you can understand it. I want you to read this description carefully, several times, and try to follow it. I will try to be as explicit as possible.

Here is the state of some of the 8051 MCU core's internal registers, the register bank, and part of the program memory at the start of this example. I will not show the data memory because it is not used directly in this example.

Program counter = 0x0042. This hexadecimal value is 0000000001000010 in binary.
A register (accumulator) = 0x33. This hexadecimal value is 00110011 in binary.

Register bank R0 = 0x00 = 00000000 binary
Register bank R1 = 0x10 = 00001000 binary
Register bank R2 = 0x01 = 00000001 binary
Register bank R3 = 0x25 = 00100101 binary
Register bank R4 = 0x00 = 00000000 binary
Register bank R5 = 0x00 = 00000000 binary
Register bank R6 = 0x00 = 00000000 binary
Register bank R7 = 0x00 = 00000000 binary

Code memory: Address 0x0040 contains 0x8E = 10001110 binary
Code memory: Address 0x0041 contains 0x22 = 00100010 binary
Code memory: Address 0x0042 contains 0x2B = 00101011 binary
Code memory: Address 0x0043 contains 0x44 = 01000100 binary
Code memory: Address 0x0044 contains 0x02 = 00000010 binary

First, I want to check that you understand how to convert between binary and hexadecimal. There is a deliberate error on one line in the list of register values above. It does not affect the example but it is still wrong. Can you find it?


Now I will describe, step by step, the way the 8051 core will execute one instruction, given the starting conditions listed above.

First, the 8051 core needs to read the first byte (the opcode byte) of the instruction that it is about to execute. It sends the program counter (PC) value to the code memory's address bus, reads the byte at that address, and increments the program counter.

This is the first instruction fetch cycle. The PC register (internal to the core) contains the current code execution address. The core needs to get the instruction that starts at that address, so it knows what to do. So it reads a byte from code memory, at the address indicated by PC, and stores it in a temporary register in the instruction decode logic. It also increments PC so it is ready for the next byte in program memory.

In this case, PC contains 0x0042 so the core will read the byte at address 0x0042 in code memory. If you look above in the code memory section you will see that this code memory location contains a byte value of 0x2B, which in binary form is 00101011. This is the first byte of an instruction.

Now the instruction decoding logic of the 8051 needs to figure out what instruction this opcode byte value represents. In this case, the opcode matches 00101rrr which is an "add A,Rr" instruction.

This instruction occupies a single byte in the code memory. The opcode byte contains all the information the core needs to perform the operation. The register which is to be added into the accumulator is identified by the bottom three bits of the opcode - the "rrr" part. The top five bits of the opcode identify the type of instruction - "add A,Rr".

So the core doesn't read any more bytes from code memory; it can start executing the instruction immediately. It knows that it needs to add the contents of the specified register into the accumulator, and it uses the ALU to do this.

The ALU has two 8-bit-wide inputs. The instruction execution logic feeds the current value of the accumulator (A) register into one of these inputs, and it uses the bottom three bits of the opcode as an address in the register file (which is just an array of 8-bit-wide RAM) to address the register specified by the opcode. In this case, the "rrr" bits are 011 which means register R3 is being selected. So the instruction execution logic feeds the current value of R3 into the second input to the ALU.

Then it tells the ALU to perform an addition operation. This adds the current accumulator value and the value of R3 together and the result appears at the output of the ALU. The instruction execution logic then copies that result back into the accumulator register.

The ALU will also modify certain flags in the program status word ("PSW") register as part of the addition process.

The instruction has now been executed. The value in the R3 register has been added into the A register, and some PSW flags have been updated. The instruction execution logic can now start executing the next instruction, which starts at code address 0x0043.


The steps involved in decoding and executing the instruction are controlled by part of the instruction execution logic called the microcode, which is stored in ROM within the core. The microcode controls the timing of the accesses to code memory, register memory, internal RAM and SFR memory, and external memory, according to the requirements for the instruction being executed.


When you understand that description, try to write up a similar description for what will happen when the 8051 core executes an instruction opcode of 0x14.

 

[vead]

OK, I'm going to have another go.

I don't think you have grasped even the basics of how an MCU core executes code. I want to take one example case and go through the process that the core uses execute it, step by step, in detail, to see if you can understand it. I want you to read this description carefully, several times, and try to follow it. I will try to be as explicit as possible.

Here is the state of some of the 8051 MCU core's internal registers, the register bank, and part of the program memory at the start of this example. I will not show the data memory because it is not used directly in this example.

Program counter = 0x0042. This hexadecimal value is 0000000001000010 in binary.
A register (accumulator) = 0x33. This hexadecimal value is 00110011 in binary.

Register bank R0 = 0x00 = 00000000 binary
Register bank R1 = 0x10 = 00001000 binary
Register bank R2 = 0x01 = 00000001 binary
Register bank R3 = 0x25 = 00100101 binary
Register bank R4 = 0x00 = 00000000 binary
Register bank R5 = 0x00 = 00000000 binary
Register bank R6 = 0x00 = 00000000 binary
Register bank R7 = 0x00 = 00000000 binary

Code memory: Address 0x0040 contains 0x8E = 10001110 binary
Code memory: Address 0x0041 contains 0x22 = 00100010 binary
Code memory: Address 0x0042 contains 0x2B = 00101011 binary
Code memory: Address 0x0043 contains 0x44 = 01000100 binary
Code memory: Address 0x0044 contains 0x02 = 00000010 binary

First, I want to check that you understand how to convert between binary and hexadecimal. There is a deliberate error on one line in the list of register values above. It does not affect the example but it is still wrong. Can you find it?


Now I will describe, step by step, the way the 8051 core will execute one instruction, given the starting conditions listed above.

First, the 8051 core needs to read the first byte (the opcode byte) of the instruction that it is about to execute. It sends the program counter (PC) value to the code memory's address bus, reads the byte at that address, and increments the program counter.

This is the first instruction fetch cycle. The PC register (internal to the core) contains the current code execution address. The core needs to get the instruction that starts at that address, so it knows what to do. So it reads a byte from code memory, at the address indicated by PC, and stores it in a temporary register in the instruction decode logic. It also increments PC so it is ready for the next byte in program memory.

In this case, PC contains 0x0042 so the core will read the byte at address 0x0042 in code memory. If you look above in the code memory section you will see that this code memory location contains a byte value of 0x2B, which in binary form is 00101011. This is the first byte of an instruction.

Now the instruction decoding logic of the 8051 needs to figure out what instruction this opcode byte value represents. In this case, the opcode matches 00101rrr which is an "add A,Rr" instruction.

This instruction occupies a single byte in the code memory. The opcode byte contains all the information the core needs to perform the operation. The register which is to be added into the accumulator is identified by the bottom three bits of the opcode - the "rrr" part. The top five bits of the opcode identify the type of instruction - "add A,Rr".

So the core doesn't read any more bytes from code memory; it can start executing the instruction immediately. It knows that it needs to add the contents of the specified register into the accumulator, and it uses the ALU to do this.

The ALU has two 8-bit-wide inputs. The instruction execution logic feeds the current value of the accumulator (A) register into one of these inputs, and it uses the bottom three bits of the opcode as an address in the register file (which is just an array of 8-bit-wide RAM) to address the register specified by the opcode. In this case, the "rrr" bits are 011 which means register R3 is being selected. So the instruction execution logic feeds the current value of R3 into the second input to the ALU.

Then it tells the ALU to perform an addition operation. This adds the current accumulator value and the value of R3 together and the result appears at the output of the ALU. The instruction execution logic then copies that result back into the accumulator register.

The ALU will also modify certain flags in the program status word ("PSW") register as part of the addition process.

The instruction has now been executed. The value in the R3 register has been added into the A register, and some PSW flags have been updated. The instruction execution logic can now start executing the next instruction, which starts at code address 0x0043.


The steps involved in decoding and executing the instruction are controlled by part of the instruction execution logic called the microcode, which is stored in ROM within the core. The microcode controls the timing of the accesses to code memory, register memory, internal RAM and SFR memory, and external memory, according to the requirements for the instruction being executed.


When you understand that description, try to write up a similar description for what will happen when the 8051 core executes an instruction opcode of 0x14.

first of all thank you for your cooperation

I am sharing my big doubt
8051 Instruction set
5 bit opcode + 3 bit register specification
7 bit opcode + 1 register specification
8 bit opcode

5 bit opcode that allow 32 operations
7 bit opcode that allow 128 oprations
8 bit opcode that allow 256 operations

Many ALU can directly access program memory . so they use registers

· Accumulator register
· Rn register (R0 to R7)
· Ram memory
· Program memory
· Instruction decoder
· Program counter
· ALU (arithmetic and Logic unit)
· PSW register

5 bit opcode + 3 bit register specification
Example
MOV A, Rn
11101 n n n

7 bit opcode + 1 register specification
MOV @Ri, A
1111011i

8 bit opcode
MOV A, direct
11100101 direct

5 bit opcode + 3 bit register specification
7 bit opcode + 1 register specification
8 bit opcode


Q I don’t understand whats the use of three different Instruction format, how they execute ?

I am not sure but look my answer

I think, first two format they don’t use Instruction decoder. Data store directly to respective register, To execute this type of Instruction they don’t use ALU

Last formmet , I think it use Instruction decoder

how the different instruction execute in different format ?

 

[vead]

I am doing some extra work

Control signal that are needed to perform each type of operation
Example

s1s2s3
0 0 0 control signal tell the ALU to do add operation (A and B)
0 0 1 control signal tell the ALU to do oroperation (A or B)
0 1 0 control signal tell the ALU to do add operation (A Nand B)
0 1 1 control signal tell the ALU to do add operation (A nor B)
1 0 0 control signal tell the ALU to do add operation (A Xor B)
1 0 1 control signal tell the ALU to do add operation (A X nor B)
1 1 0 control signal tell the ALU to do add operation (A add B)
1 1 1 control signal tell the ALU to do add operation (A sub B)

S1 s2 s3 c ac A B output Oc Oac
0 0 0 x x xxxx xxxx F x x
0 0 1 xxxx xxxx F
0 1 0 xxxx xxxx F
0 1 1 xxxx xxxx F
1 0 0 xxxx xxxx F
1 0 1 xxxx xxxx F
1 1 0 xxxx xxxx F
1 1 1 xxxx xxxx F

We can d0 same with 8 bit ALU for 8051
psw register 8 bit
PSW register will be rember C, Ac ,O
Input control signal...?
Input Operand 1 8 bit
Input Operand 2 8 bit
Output F 8 bit
Carry input c
Auxilarry carry ac
Output carry OC
Auxiliary carry acO

Q. what control signal that are needed to perform ALU operation for 8051?

 

[KrisBlueNZ]

You just ignored my post.

You are trying to teach yourself things that you don't understand. You are getting into details before you have even a basic understanding of opcodes and how they are executed.

You will not learn from your own ideas. You will only learn by following the guidance of people who already understand.

I am going to give you one more chance to try to learn from me.

5 bit opcode + 3 bit register specification
7 bit opcode + 1 register specification
8 bit opcode

Yes, that describes part of the 8051 opcode map.

Some opcodes are the full 8 bits wide. For example:

0 0 0 0 0 0 0 0 nop
0 0 0 1 0 1 0 0 dec A
1 1 1 1 0 1 0 0 cpl A
1 1 0 0 0 0 1 1 clr C

Some opcodes include a 3-bit register specification. For example:

0 0 0 1 1 r r r dec Rr
1 1 1 1 1 r r r mov Rr,A
0 0 1 0 1 r r r add A,Rr

Some opcodes include a 1-bit register specification. These use a register as a memory pointer for indirect access. Let's ignore these instructions to start with.


Let's pretend to be the 8051 core. You know it keeps track of the code execution address in code memory through the PC (program counter) register. When it's time to fetch, decode and execute an instruction, it fetches a byte from code memory at the address pointed to by the PC register.

Let's assume that the 8051 core fetches an opcode, and that opcode is 00101011 binary. How does it know what to do? It internally decodes that instruction to figure out several things about it.

This decoding is controlled by the microcode, which controls a whole lot of signals within the core so that the core will execute the instruction step-by-step and produce the right result.

In principle, the microcode maps each possible first instruction byte value (there are 256 of these) to a sequence of control signals within the core. These signals cause actions like reading and writing registers, reading and writing memory, sending data to the ALU, transferring results from the ALU, and so on.

The first instruction byte is 00101011. This is an "add A,Rr" instruction and the rrr bits a 011 which means it is referencing R3, so the instruction, in full, is "add A,R3".

Any instruction byte that has 00101 in the top three bits is an "add A,Rr" instruction. When the top five bits contain those values, the core knows that this must be an "add A,Rr" instruction, and that the bottom three bits specify the register number.

The microcode for that number will cause the core to send the contents of the A register to one input of the ALU, and send the contents of the register specified by the rrr field of the instruction (i.e. R3) to the other input of the ALU. Then it will instruct the ALU to perform an addition operation. Then it will load the result from the ALU into the A register.

These micro-operations are all performed in the correct sequence, under control of the microcode. The microcode drives a whole lot of signals inside the core which control how data is channeled between internal registers (A, PC, PSW), addressable registers (R0~R7), RAM, SFRs, and code memory.

You may know that in the standard 8051, each instruction takes a multiple of 6 clock cycles to execute. Each one of those clock cycles represents one phase of the microcode. The microcode is like a tiny, low-level program. It takes the first instruction byte and coordinates all of the internal data transfers within the core (and to the RAM and code memory) to execute the specified instruction.


Now, if you want any more help from me, you will read and try to understand this description. If you're not sure, ask me any questions about it.

DO NOT ask me unrelated questions as you did in your last post. You need to understand this stuff first.

 

[vead]

Now, if you want any more help from me, you will read and try to understand this description. If you're not sure, ask me any questions about it.
.

I have little query about mov instruction
How they fetch decode and execute ?

Mov instruction
1. MOV @Rn, #immediate encoding 0111011 r
Operation: mov@R0,#0
MOV @R0, #0 encoding 01110110 00000000

01110110 00000000
This is 2 bytes Instruction
which is fetch, decode and execute unit ?


2. MOV @Ri, A encoding 1111011i
Operation mov@Ri,A
Mov @R0,A encoding 11110110

11110110
This is 1 byte instruction
Which is fetch , decode and execute unit ?


3. MOV dest_direct, src_direct
MOV P1, P0
10000101 src_direct dest_direct

10000101 aaaaaaaa aaaaaaaa
This is 3 bytes instruction
Which is fetch , decode and execute unit ?


4. MOV direct, @Ri
10001 0 0 0 MOV direct, R0 Mov the content of R0 into address

10001000 aaaaaaaa
This is 2 bytes instruction
Which is fetch , decode and execute unit for this instruction ?

 

[KrisBlueNZ]

I have little query about mov instruction
How they fetch decode and execute ?

Mov instruction
1. MOV @Rn, #immediate encoding 0111011 r
Operation: mov@R0,#0
MOV @R0, #0 encoding 01110110 00000000

01110110 00000000
This is 2 bytes Instruction
which is fetch, decode and execute unit ?

2. MOV @Ri, A encoding 1111011i
Operation mov@Ri,A
Mov @R0,A encoding 11110110

11110110
This is 1 byte instruction
Which is fetch , decode and execute unit ?

3. MOV dest_direct, src_direct
MOV P1, P0
10000101 src_direct dest_direct

10000101 aaaaaaaa aaaaaaaa
This is 3 bytes instruction
Which is fetch , decode and execute unit ?

4. MOV direct, @Ri
10001 0 0 0 MOV direct, R0 Mov the content of R0 into address

10001000 aaaaaaaa
This is 2 bytes instruction
Which is fetch , decode and execute unit for this instruction ?

DO NOT ask me unrelated questions as you did in your last post.

 

[vead]

that's the question, that I don't understand so I asked you.
DO I need to create another thread for these question
actually what work do you want from me ?

 

[KrisBlueNZ]

1. Don't start another thread.

2. Do you understand post #68 in this thread?

3. Explain (like I did in post #68) how the 8051 core will process an instruction of 00010100. (Hint: look in the "dec" (decrement) instructions.)

 

[vead]

1. Don't start another thread.

2. Do you understand post #68 in this thread?

3. Explain (like I did in post #68) how the 8051 core will process an instruction of 00010100. (Hint: look in the "dec" (decrement) instructions.)

Ok I try to explain with following assembly program

 address    Machine language  assembly language
  1 0000                                          ORG 0H
  2 0000        7D25                       MOV R5,#25H
  3 0002        7F34                        MOV R7#34H
  4 0004         7400                       MOV A,#0
  5 0006         2D                           ADD A,R5
  6 0007         2F                           ADD A,R7
  7 0008       2412                          ADD A,#12H
  8 000A       80FE    HERE:          SJMP HERE
  9 000C 000C                               END

MOV R5,#25H encoding 01111 1 0 1 0010 0101 2 bytes instruction
MOV R7#34H encoding 01111 1 1 1 0011 0100 2 bytes instruction
MOV A,#0 encoding 01110 1 0 0 00000000 2 Bytes instruction
ADD A,R5 encoding 00101 1 0 1 1 Byte instruction
ADD A,R7 encoding 001011 1 1 1 Byte instruction
ADD A,#12H encoding 001001 0 0 0001 0010 2 Bytes Instruction


PROGRAM MEMORY

Address code binary number
0000 7D 0111 1101
0001 25 0010 0101
0002 7F 0111 1111
0003 34 0011 0100
0004 74 0111 0100
0005 00 0000 0000
0006 2D 0010 1101
0007 2F 0010 1111
0008 24 0010 0100
0009 12 0001 0010
000A 80
000B FE





When the 8051 is powered up, the PC (program counter) has 0000 and starts
to fetch the first opcode from location 0000 of the program ROM. In the case
of the above program the first opcode is 7D, which is the code for moving an
operand to R5. Upon executing the opcode, the CPU fetches the value 25 and
places it in R5. Now one instruction is finished. Then the program counter is
incremented to point to 0002 (PC = 0002), which contains opcode 7F, the
opcode for the instruction “MOV R7 , . .”.

· Upon executing the opcode 7F, the value 34H is moved into R7. Then the program counter is incremented to 0004.

· ROM location 0004 has the opcode for the instruction “MOV A, #0″. This
instruction is executed and now PC = 0006. all the above instruc
tions are 2-byte instructions; that is, each one takes two memory locations.

· Now PC = 0006 points to the next instruction, which is “ADD A, R5″. This is
a 1-byte instruction. After the execution of this instruction, PC = 0007.

· The location 0007 has the opcode 2F, which belongs to the instruction “ADD
A,R7″. This also is a 1-byte instruction. Upon execution of this instruction,
PC is incremented to 0008. This process goes on until all the instructions are
fetched and executed.

the program counter points at the next
instruction to be executed

 

[KrisBlueNZ]

VEAD.

YOUR ENTIRE POST was COPIED WORD FOR WORD from http://renusblog.codemyne.net/Admin/Post.aspx?postid=7.

YOU WILL NEVER LEARN ANYTHING IF YOU ONLY PRETEND TO UNDERSTAND.

I am very tempted to ban you from Electronics Point immediately for plagiarism and outright lying, and as a probable TROLL.

I have put you on my "ignore" list. I have only ever done this with one user before.

You will not be getting any more help from me.

 

[vead]

VEAD.

YOUR ENTIRE POST was COPIED WORD FOR WORD from http://renusblog.codemyne.net/Admin/Post.aspx?postid=7.

YOU WILL NEVER LEARN ANYTHING IF YOU ONLY PRETEND TO UNDERSTAND.

I am very tempted to ban you from Electronics Point immediately for plagiarism and outright lying, and as a probable TROLL.

I have put you on my "ignore" list. I have only ever done this with one user before.

You will not be getting any more help from me.

I am really sorry, I agree It was my mistake, Some time I don't understand what suggestion do you give me It may be my English problem and definitely I will improve my English

so please give me one chance,, don't ban me, I need one chance , give me one chance I will show you my work then decide what do you think

vead

 

[Gryd3]

I am really sorry, I agree It was my mistake, Some time I don't understand what suggestion do you give me It may be my English problem and definitely I will improve my English

so please give me one chance,, don't ban me, I need one chance , give me one chance I will show you my work then decide what do you think

vead

Vead. My suggestion to you, is to go do some reading. Find a tutorial for something that interests you and follow it.
What you have done is not related in any way to your English skills. The proper way to go about this is to take the steps to teach yourself. Everyone on here is a volunteer, we are not obligated to share any of our time, skill, or knowledge but we choose to share.
I think you are trying to learn too much too fast and that is why you are not understanding. You may also be trying to learn something that is too advanced for you.

You may not realize it, but you have been given a second chance on a few occasions. Look through some of your previous topics, and you will find that most of the suggestions and tips that have been given to you are ignored.
For now you are still here. Consider that a blessing.

Once more. Go google some basic circuits and play with them and learn them.
I will not participate in any of your threads unless :
-You have a circuit diagram you are trying to build, or design.
-You have a program you are trying to write or fix.
-You have an electronic device that you are trying to repair.

When you can show some progress and a genuine willingness to learn, you will find that more people will answer you.

 

[vead]

We write assembly code on assembler like this

Assembly code

MOV A, # 4A ; load data 4A into A register
MOV R1,# 5E ; load the data 5E into R1
ADD A,R1 ; add the content of R1 into A register
INC R1 ; increase R1 with 1
INC A ; increase A with 1
MOV A,R1 ; move the value of R1 into A register


Look following way how this assembly code convert in binary form

Assembly code
MOV A, # 4A
Mcahine code

0000  74 4A

BINARY CODE

0000 0000 0000 0000  0111 0100

                                       0100 1010

Example

Memory address  Hex code  assembly language  comments

0000                     74 4A  MOV A,#4A  ; Load the immediate data into A

Where 0000 is memory address. 74 is mov A opcode and 4A is operand
Processor read Byte from Program memory at the address indicate by program counter

Example: processor read Byte (0111 0100) which is opcode MOV A

First processor(cpu) need to read first byte of instruction

Example 0111 0100 74 first byte

0100 1010 4A second Byte

So processor read Byte form program memory at the address 0000 indicate by program counter and Store Data 4A into Accumulator registor

So program counter increament and its ready for next bytes in program counter

Ok If next memory address is 0002
Assembly code
MOV R1,# 5E
Mcahine code
0002 79 5E
Binary code
processor read Byte (0111 0100) which is opcode MOV R1

So processor read Byte form program memory at the address 0002 indicate by program counter and Store Data 4A into Accumulator registor



Again program counter increament and its ready for next bytes in program counter

Ok If next memory address is 0004


Assembly code

ADD A,R1


Machine code

0004 29
processor read Byte (0111 0100) which is opcode MOV R1

So processor read Byte form program memory at the address 0002 indicate by program counter and Store Data 4A into Accumulator registor
Again program counter increament and its ready for next bytes in program counter

Ok If next memory address is 0004
Assembly code
ADD A,R1
Machine code
0004 29

0000 0000 0010  01111 001
                             0101 1110

Binary code

00000 00000  0100  00101001  (00101rrr)

Memory address  Hex code  assembly language  comments

0004                      74  ADD A,R1  ; Add the content of R1 into A

So the processor doesn't read any more bytes from program memory; it can start executing the instruction immediately. It knows that it needs to add the contents of the specified register into the accumulator, and it uses the ALU to do this.

8051 has 8 bit ALU


The instruction execution logic unit store the current data 4A of Accumulator into the Input of ALU

And instruction execution logic unit store the current data of R3 into the second input to the ALU

Then it tells the ALU to perform an addition operation

and the result appears at the output of the ALU.

ALU also use pse register toremember carry auxillary carry overflow …

Then the program counter is incremented to 0005.

Assembly code
INC R1
Machine code
0005 0B
Binary code
0000 0000 0101 00001 001

The instruction execution logic unit will Increment R1 register
Increment program counter to next Instruction 0006

Assembly code
INC A
Machine code
0006 04
Binary code
0000 0000 0110 00000100

The instruction execution logic unit will Increment A register


Increment program counter to next Instruction 0007

Assembly code
MOV A,R1
Machine code
0007 E9
Binary code
0000 0000 0000 0111 11101001

Now the code look like in assembly
Assembly code

MOV A, # 4A  ; load data 4A into A register
MOV R1,# 5E  ; load the data 5E into R1
ADD A,R1  ; add the content of R1 into A register
INC R1  ; increase R1 with 1
INC A  ; increase A with 1
MOV A,R1  ; move the value of R1 into A register

Machine code

0000  74 4A

0002  79 5E

0004  29

0005  0B

0006  04

0007  E9

Binary code

0000 0000 0000 0000  0111 0100

                                     0100 1010

0000 0000 0000 0010  01111 001

                                      0101 1110

0000 0000 0000 0100  00101001

0000 0000 0000 0101  00001 001

0000 0000 0000 0110 00000100

0000 0000 0000 0111 11101001

Finally to understand someone

Assembly code

0000          74 4A       MOV A, # 4A  ; load data 4A into A register

0002          79 5E        MOV R1,# 5E  ; load the data 5E into R1

0004           29         ADD A, R1  ; add the content of R1 into A register

0005           0B          INC R1  ; increase R1 with 1

0006           04         INC A  ; increase A with 1

0007          E9        MOV A,R1  ; move the value of R1 into A register

Program memory will be following

Memory address opcode operand

0000                    74 4A

0002                        79 5E

0004                         29

0005                       0B

0006                       04

0007                        E9

Program counter will be following

0000 0000 0000 0000

0000 0000 0000 0010

0000 0000 0000 0100

0000 0000 0000 0101

0000 0000 0000 0110

 

[davenn]

Vead

Im going to close this thread for now, as the 2 people that were trying to help you have stopped doing so
so please no more on the 8051 or similar device OK
have a think about something a little more simpler .... maybe come up to something more modern like a PIC or similar micro controller
Do some reading and learning for a start on your own
if you have some questions then start a new thread

cheers
Dave