[John S]

This question is really prompted by the discussion on the thread "How to
Bias a CS mosfet." In playing around with the possibilities, I noticed
that the MOSFET had an unreasonably high (ISTM) small-signal gain. So, I
put most everything about biasing exactly to 1/2 Vdd aside to investigate.

In the LTSpice circuit listed below, I can measure a small-signal gain
of about 690. On the few data sheets I've found them, the transfer
characteristics seem to flatten out at low drain currents implying no
such thing.

Question: Does this mean that spice simulations do not work at low
MOSFET drain currents?

Thanks,
John S

 

[John S]

This question is really prompted by the discussion on the thread "How to
Bias a CS mosfet." In playing around with the possibilities, I noticed
that the MOSFET had an unreasonably high (ISTM) small-signal gain. So, I
put most everything about biasing exactly to 1/2 Vdd aside to investigate.

In the LTSpice circuit listed below, I can measure a small-signal gain
of about 690. On the few data sheets I've found them, the transfer
characteristics seem to flatten out at low drain currents implying no
such thing.

Question: Does this mean that spice simulations do not work at low
MOSFET drain currents?

Thanks,
John S

Well, of course, I forgot to post the spice list:

Version 4
SHEET 1 880 680
WIRE 416 -176 240 -176
WIRE 240 -144 240 -176
WIRE 416 -144 416 -176
WIRE 416 -48 416 -64
WIRE 64 -16 -96 -16
WIRE 96 -16 64 -16
WIRE 240 -16 240 -64
WIRE 240 -16 176 -16
WIRE -96 0 -96 -16
WIRE 64 16 64 -16
WIRE 240 32 240 -16
WIRE -96 80 -96 64
WIRE 240 96 240 32
WIRE -80 176 -96 176
WIRE -32 176 -80 176
WIRE 64 176 64 96
WIRE 64 176 32 176
WIRE 112 176 64 176
WIRE 192 176 112 176
WIRE 64 208 64 176
WIRE 240 208 240 192
WIRE -96 224 -96 176
WIRE 64 304 64 288
WIRE 240 304 240 288
WIRE -96 320 -96 304
FLAG 240 304 0
FLAG -96 320 0
FLAG 416 -48 0
FLAG 64 304 0
FLAG 240 32 d
FLAG 112 176 g
FLAG -80 176 source
FLAG -96 80 0
SYMBOL nmos 192 96 R0
SYMATTR InstName M1
SYMATTR Value BSZ0920NS
SYMBOL res 224 -160 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL voltage 416 -160 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage -96 208 R0
WINDOW 123 40 59 Left 0
WINDOW 39 24 44 Left 0
WINDOW 3 -229 119 Left 0
SYMATTR Value2 AC 1m
SYMATTR Value SINE(0 .001 1000)
SYMATTR InstName V2
SYMBOL res 192 -32 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 5meg
SYMBOL cap -32 192 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C1
SYMATTR Value 1µ
SYMBOL res 48 192 R0
SYMATTR InstName R3
SYMATTR Value 5.1meg
SYMBOL res 224 192 R0
SYMATTR InstName R4
SYMATTR Value .0001
SYMBOL res 80 112 R180
WINDOW 0 36 76 Left 0
WINDOW 3 36 40 Left 0
SYMATTR InstName R5
SYMATTR Value 5meg
SYMBOL cap -112 0 R0
SYMATTR InstName C4
SYMATTR Value 1µ
TEXT -192 360 Left 0 !;op
TEXT -336 232 Left 0 !.ac dec 1e4 20 20k
TEXT -376 -8 Left 0 !;tran 0 .2 .01 1u

 

[Winfield Hill]

John S wrote...

This question is really prompted by the discussion on the thread "How to
Bias a CS mosfet." In playing around with the possibilities, I noticed
that the MOSFET had an unreasonably high (ISTM) small-signal gain. So, I
put most everything about biasing exactly to 1/2 Vdd aside to investigate.

In the LTSpice circuit listed below, I can measure a small-signal gain
of about 690. On the few data sheets I've found them, the transfer
characteristics seem to flatten out at low drain currents implying no
such thing.

Question: Does this mean that spice simulations do not work at low
MOSFET drain currents?

Most Spice MOSFET models don't work properly in the
subthreshold region. (Note, for power MOSFETs, this
region continues up to fairly-high currents, because
the current density is still quite low, given the high
currents the parts are meant to handle.) However, if
the Spice models did work properly in the subthreshold
region, they'd show high gain, approaching or maybe
exceeding that of a BJT.

For a BJT, g_m is proportional to current, g_m = Ic/V_T,
until some internal resistances dominate at high current
densities. V_T = kT/q = 25mV at room temp.

A MOSFET's g_m in the subthreshold region is also usually
proportional to current: g_m = Ic/ n V_T, where n ranges
from 2 to 5, etc. (At higher currents, g_m ~ sqrt Id.)

Assuming high load resistances, e.g., a current source,
we can derive Gmax = g_m / g_os. That 2nd term is the
output conductance = 1 / output-resistance. Most MOSFETs
have remarkably-low output conductance, even much better
than most BJTs (Another way of saying this is that they
have very high Early voltages, V_A.) For many parts,
Gmax doesn't change much with current, so it's a more
useful parameter to evaluate this scene than g_os.

All this said, I suspect your value of G=690 wouldn't
hold up with bench measurements. Another point I make
all the time is, validate your Spice models with bench
measurements before you give them any credence.

 

[Winfield Hill]

Phil Hobbs wrote...

Nah, for a given drain current its transconductance can approach but not
exceed the BJT's, because the fundamental limit of transconductance is
set by the thermal spreading of the Fermi level, and BJTs achieve that
limit.

Absolutely, I didn't mean to imply otherwise,
that's why I said n = 2 or higher. However,
for a MOSFET with a fairly high g_m, close to
a BJT, and a much better g_os than the BJT,
as most have, I'm theorizing that it could
have a higher Gmax.

 

[John S]

John S wrote...

Most Spice MOSFET models don't work properly in the
subthreshold region. (Note, for power MOSFETs, this
region continues up to fairly-high currents, because
the current density is still quite low, given the high
currents the parts are meant to handle.) However, if
the Spice models did work properly in the subthreshold
region, they'd show high gain, approaching or maybe
exceeding that of a BJT.

For a BJT, g_m is proportional to current, g_m = Ic/V_T,
until some internal resistances dominate at high current
densities. V_T = kT/q = 25mV at room temp.

A MOSFET's g_m in the subthreshold region is also usually
proportional to current: g_m = Ic/ n V_T, where n ranges
from 2 to 5, etc. (At higher currents, g_m ~ sqrt Id.)

Assuming high load resistances, e.g., a current source,
we can derive Gmax = g_m / g_os. That 2nd term is the
output conductance = 1 / output-resistance. Most MOSFETs
have remarkably-low output conductance, even much better
than most BJTs (Another way of saying this is that they
have very high Early voltages, V_A.) For many parts,
Gmax doesn't change much with current, so it's a more
useful parameter to evaluate this scene than g_os.

All this said, I suspect your value of G=690 wouldn't
hold up with bench measurements. Another point I make
all the time is, validate your Spice models with bench
measurements before you give them any credence.

Thanks, Win, I would have done so (without posting) if I had one of the
devices that LTSpice has. I thought asking was faster than ordering devices.

Your input is very much appreciated.

Cheers,
John S

 

[John S]

John S wrote...

This question is really prompted by the discussion on the thread "How to
Bias a CS mosfet." In playing around with the possibilities, I noticed
that the MOSFET had an unreasonably high (ISTM) small-signal gain. So, I
put most everything about biasing exactly to 1/2 Vdd aside to investigate.

In the LTSpice circuit listed below, I can measure a small-signal gain
of about 690. On the few data sheets I've found them, the transfer
characteristics seem to flatten out at low drain currents implying no
such thing.

Question: Does this mean that spice simulations do not work at low
MOSFET drain currents?

Most Spice MOSFET models don't work properly in the
subthreshold region. (Note, for power MOSFETs, this
region continues up to fairly-high currents, because
the current density is still quite low, given the high
currents the parts are meant to handle.) However, if
the Spice models did work properly in the subthreshold
region, they'd show high gain, approaching or maybe
exceeding that of a BJT.

For a BJT, g_m is proportional to current, g_m = Ic/V_T,
until some internal resistances dominate at high current
densities. V_T = kT/q = 25mV at room temp.

A MOSFET's g_m in the subthreshold region is also usually
proportional to current: g_m = Ic/ n V_T, where n ranges
from 2 to 5, etc. (At higher currents, g_m ~ sqrt Id.)

Assuming high load resistances, e.g., a current source,
we can derive Gmax = g_m / g_os. That 2nd term is the
output conductance = 1 / output-resistance. Most MOSFETs
have remarkably-low output conductance, even much better
than most BJTs (Another way of saying this is that they
have very high Early voltages, V_A.) For many parts,
Gmax doesn't change much with current, so it's a more
useful parameter to evaluate this scene than g_os.

All this said, I suspect your value of G=690 wouldn't
hold up with bench measurements. Another point I make
all the time is, validate your Spice models with bench
measurements before you give them any credence.

A year or so ago I evaluated several brands for good modeling sub-threshold.
It's likely still on my website. I'll try to remember what I called it ;-)

...Jim Thompson

[On the Road, in New York]

Here you go...

http://www.analog-innovations.com/SED/Compare2N7000Models.pdf

...Jim Thompson

[On the Road, in New York]

Thanks, Jim.

It will take my old brain some time to digest this, but I appreciate
your input very much.

Cheers,
John S

 

[John S]

John S wrote...

This question is really prompted by the discussion on the thread "How to
Bias a CS mosfet." In playing around with the possibilities, I noticed
that the MOSFET had an unreasonably high (ISTM) small-signal gain. So, I
put most everything about biasing exactly to 1/2 Vdd aside to investigate.

In the LTSpice circuit listed below, I can measure a small-signal gain
of about 690. On the few data sheets I've found them, the transfer
characteristics seem to flatten out at low drain currents implying no
such thing.

Question: Does this mean that spice simulations do not work at low
MOSFET drain currents?

Most Spice MOSFET models don't work properly in the
subthreshold region. (Note, for power MOSFETs, this
region continues up to fairly-high currents, because
the current density is still quite low, given the high
currents the parts are meant to handle.) However, if
the Spice models did work properly in the subthreshold
region, they'd show high gain, approaching or maybe
exceeding that of a BJT.

For a BJT, g_m is proportional to current, g_m = Ic/V_T,
until some internal resistances dominate at high current
densities. V_T = kT/q = 25mV at room temp.

A MOSFET's g_m in the subthreshold region is also usually
proportional to current: g_m = Ic/ n V_T, where n ranges
from 2 to 5, etc. (At higher currents, g_m ~ sqrt Id.)

Assuming high load resistances, e.g., a current source,
we can derive Gmax = g_m / g_os. That 2nd term is the
output conductance = 1 / output-resistance. Most MOSFETs
have remarkably-low output conductance, even much better
than most BJTs (Another way of saying this is that they
have very high Early voltages, V_A.) For many parts,
Gmax doesn't change much with current, so it's a more
useful parameter to evaluate this scene than g_os.

All this said, I suspect your value of G=690 wouldn't
hold up with bench measurements. Another point I make
all the time is, validate your Spice models with bench
measurements before you give them any credence.

A year or so ago I evaluated several brands for good modeling sub-threshold.
It's likely still on my website. I'll try to remember what I called it ;-)

...Jim Thompson

[On the Road, in New York]

Here you go...

http://www.analog-innovations.com/SED/Compare2N7000Models.pdf

...Jim Thompson

[On the Road, in New York]

Wow! It looks like the closer to zero Id it gets, the greater is
dId/dVgs (Gm).

Yes?

John S

 

[John S]

The voltage gain equals the transconductance times the parallel
combination of the drain load resistance and the drain resistance, which
is 1/(partial dI_D / dV_DS) with V_GS held constant.

Is SPICE capabable of producing these quantities?

John S

 

[John S]

Is SPICE capabable of producing these quantities?

John S

I guess that was an ill-formed question.

I understand what you are saying. What I really want to know is, can I
trust any of the results that you mention at those low drain currents?

John S

 

[John S]

If you replace the drain load with a 6 ma current source, and bump up
the feedback resistors, the gain increases to 3200. Which makes me
suspect the fet model.

Get a real fet and try it.


John

Yes, that is the ultimate answer. However, I do not have the devices
available to LTSpice and I thought I could get the answer here without
waiting for delivery. Poor excuse, perhaps. But I thought it worthwhile
asking.

John S

 

[John S]

If you replace the drain load with a 6 ma current source, and bump up
the feedback resistors, the gain increases to 3200. Which makes me
suspect the fet model.

Get a real fet and try it.


John

Actually, I don't want to replace the drain load with a current source.
Will you then no longer suspect the FET model?

John S