noise problem in voltage booster circuit

[jsmith]

Hi all,

I developed a simulation of the proposed voltage booster using
"Electronics Workbench 5.12"
http://john111smith.googlepages.com/Untitled.EWB
but it seems that software cannot analysis it.
I will be appreciated with your comments and suggestions in this
regards.

 

[John Popelish]

Hi all,

I developed a simulation of the proposed voltage booster using
"Electronics Workbench 5.12"
http://john111smith.googlepages.com/Untitled.EWB
but it seems that software cannot analysis it.
I will be appreciated with your comments and suggestions in this
regards.

I do not have EWB in my computer. Please email me a screen
capture

(print screen key to put image in copy buffer, then paste
into image program, like paint or Irfanview, save as gif)

of the schematic, so I can help debug.

 

[jsmith]

I do not have EWB in my computer. Please email me a screen
capture

(print screen key to put image in copy buffer, then paste
into image program, like paint or Irfanview, save as gif)

of the schematic, so I can help debug.

It is http://john111smith.googlepages.com/wrkbnch.GIF

 

[John Popelish]

It is http://john111smith.googlepages.com/wrkbnch.GIF

If you email me so I have your address, I'll send a
schematic that works in LTspice. Have you got that loaded
in your computer? It is far superior to EWB.

 

[jsmith]

If you email me so I have your address, I'll send a
schematic that works in LTspice. Have you got that loaded
in your computer? It is far superior to EWB.

Thanks all, esp John Popelish for favours

I will be appreciated with your comments and suggestions for add an AC
level (~1V 3KHz) on the DC level (30 to 100 V) of the proposed circuit

 

[jsmith]

Thanks all, esp John Popelish for favours

I will be appreciated with your comments and suggestions for add an AC
level (~1V 3KHz) on the DC level (30 to 100 V) of the proposed circuit

AC wave is Sinus one

 

[John Popelish]

I will be appreciated with your comments and suggestions for add an AC
level (~1V 3KHz) on the DC level (30 to 100 V) of the proposed circuit

This will require optimizing the frequency response of the
whole loop. The best response would probably require
cascoding the output transistor to minimize the effect of
feedback capacitance collector to base on the inverting
transistor. I'll go back to the simulator and play a bit.