Thermal Hysterisis

[Linear]

Has anybody on this newsgroup got any information on thermal hysterisis
regarding input offset voltage on op-amps. How big is the effect? How to
minimize? Etc.

 

[R.Legg]

Has anybody on this newsgroup got any information on thermal hysterisis
regarding input offset voltage on op-amps. How big is the effect? How to
minimize? Etc.

This is caused by thermal gradients occuring across the IC substrate
as power dissipation varies. The hysterisis effect is time-related,
rather than static, as the temperature gradient lags the dissipation
change.

The cure is in layout of the IC - differential inputs will have a
symetrical physical relationship with and exposure to the major load
and line dependant dissipators. As a result the inputs see the same
temperatures under varying gradients, as the dissipation varies.

There are other thermal effects external to the IC that also have to
be watched.

RL

 

[R.Legg]

Has anybody on this newsgroup got any information on thermal hysterisis
regarding input offset voltage on op-amps. How big is the effect? How to
minimize? Etc.

The bit about hysterisis and time.

If the input signal persists long enough (in the poorly laid-out IC)
to establish a die temperature change in an open loop or comparator
stage, the threshold will appear to have drifted when the signal
reverses, and vice-versa, as the temperature gradient across the input
transistors has changed.

For audio AC signals, a change in output amplitude (and internal power
dissipation) results in a gradual DC offset change that is inevitably
reversable, with no real static hysterisis.

RL