UPS sine wave vs square wave output?

[John Tserkezis]

However for medium/high power (>3-4 kVA) they are always sine wave
inverters (PWM bridge + LC filter)

Perhaps because of the higher price tag for units of that power, the
additional cost of sine is less significant than for a lower power inverter?

 

[Terry Given]

Terry Given wrote:




It also helps that many "square wave" UPSs don't just go from full
pluss to full minus, but instead go plus -> zero -> minus -> zero
-> plus -> and so forth. I seem to remember reading about a few
that would have five or seven voltage levels instead of three.

yep. careful selection of the "dead" time gives about the right RMS
value, and reduces harmonic content. More steps = better but circuit
complexity increases. Lots of work has been done on so-called
multi-level inverters for high power drives - partly to minimise
harmonics, partly because of the lack of availability of high voltage
IGBTs - although 6kV IGBTs are readily available, they have very high
Vcesat and switch incredibly slowly. Trade that off versus gazillions of
bits. 3-level inverters seem to be a good compromise in that regard.


Cheers
Terry

 

[Ken Smith]

A square wave input of the same RMS value of an equivalent sine wave will
have a much higher crest factor. That is, the peak value is *much* higher in
relation to the RMS value, as compared to a sine wave.

I think you have this statement backwards. The peak of a perfect
squarewave is equal to the RMS. The peak of a perfect sine wave is
1.414... times the RMS value.

Most "square wave" converters don't really make a square wave. They make
a signal like this:

ASCII Art:



....******............******.......
...................................
...................................
***......***......***......***.... 0V
...................................
...................................
.............******............****

The peaks are about 20% higher than the RMS rating. This make the output
of a capacitively filtered rectifier end up about 20% lower than expected.

Fortunately most electronics can handle this. Unfortunately not all
electronics can and electric motors also can have trouble with it.

This waveform has high frequency components in it. Many transformers and
motors and the like are made from iron that becomes quite lossy at higher
frequencies.

Induction motors are double trouble in this regard. They always appear
fairly lossy at higher frequencies when they are running. The exact
explaination is long but the simple version is the that the motor is
trying to run at both its normal speed and at 5 times that speed. As far
as 5 times the speed is concerned, the motor's rotor is nearly blocked
(not turning). this leads to very high losses.

Most power supplies simply bridge rectify the AC input, and feed that
somewhat pulsating DC into the regulator that does the bulk of the work.

The word "somewhat" is becoming less true. Newer supplies rectify the
input and run the pulsating DC with nearly no filtering into a DC-DC
converter that is designed so that over the period of a few cycles its
input current is proportional to the applied voltage. This regulator does
not regulate very well and is followed by a large filter capacitor and a
second DC-DC converter. This is how modern power supplies make themselves
appear to be resistive loads to the power grid.

 

[Guy Macon]

Most "square wave" converters don't really make a square wave.
They make a signal like this:

ASCII Art:

...******............******.......
..................................
..................................
***......***......***......***.... 0V
..................................
..................................
............******............****

Something just occured to me as being the sort of thing I should
already know; during the 0V periods, is the output high impedence
as one would expect with minimum FETs, or is there an extra set of
FETs that clamp it to 0V? If it is high impedence, I would expect
some interesting waveforms as the inductance of the load drives
the line. If it is clamped to 0V, it would be interesing to see
hopw they derive that 0V in single phase hot/neutral systems where
the bottom trace is zero volts relative to earth/ground.

 

[gwhite]

You don't. Not intentionally anyway.

A square wave input of the same RMS value of an equivalent sine wave will
have a much higher crest factor.

Huh? The crest factor of a sq-wave is 1 (0 dB). The crest factor of a
sine-wave is 1.414 (3 dB). Why do you believe what you wrote?

 

[John Tserkezis]

Huh? The crest factor of a sq-wave is 1 (0 dB). The crest factor of a
sine-wave is 1.414 (3 dB). Why do you believe what you wrote?

Because your statement only holds true for a square wave operating at 100%
duty. That certainly is not the case for most of the time and probably not the
case for ANY of the time in many cases.

 

[John Woodgate]

I read in sci.electronics.design that Ken Smith

Newer supplies rectify the
input and run the pulsating DC with nearly no filtering into a DC-DC
converter that is designed so that over the period of a few cycles its
input current is proportional to the applied voltage. This regulator
does not regulate very well and is followed by a large filter capacitor
and a second DC-DC converter. This is how modern power supplies make
themselves appear to be resistive loads to the power grid.

What are these power supplies used for? What is the incentive to make
the load resistive (outside Europe)?

 

[Ken Smith]

Something just occured to me as being the sort of thing I should
already know; during the 0V periods, is the output high impedence
as one would expect with minimum FETs, or is there an extra set of
FETs that clamp it to 0V? If it is high impedence, I would expect
some interesting waveforms as the inductance of the load drives
the line. If it is clamped to 0V, it would be interesing to see
hopw they derive that 0V in single phase hot/neutral systems where
the bottom trace is zero volts relative to earth/ground.

The only one I've looked closely at used 4 MOSFETs in a full bridge and
did a plus-sproing-0V-sproing-neg-sprong-0V pattern as the MOSFETs we all
off breifly at each change in voltage.

 

[Ken Smith]

I read in sci.electronics.design that Ken Smith


What are these power supplies used for? What is the incentive to make
the load resistive (outside Europe)?

If you get a largish supply (1KW) for running DC equipment in the lab,
there is some chance that you will find it is one of these. In Europe
there is some sort of silly set of rules called CE that it is claimed
specify the harmonic content of the input current. This is just a rumor
though.

In the past, efforts had to be made to keep the peak current in the
recifiers within reason. This often involved largish (mechanically)
resistors and inductors. The spiky current shape made for more line drop
than the simple math would lead you to believe. Today a "power factor
correction" chip and the related stuff doesn't cost an arm and a leg.
These factors have gotten together to make the designers start to use the
PFC chips. Generally, the PFC section is just a simple booster. It is
non-isolated.

 

[John Woodgate]

I read in sci.electronics.design that Ken Smith

If you get a largish supply (1KW) for running DC equipment in the lab,
there is some chance that you will find it is one of these. In Europe
there is some sort of silly set of rules called CE that it is claimed
specify the harmonic content of the input current. This is just a rumor
though.

Yeah, right!

In the past, efforts had to be made to keep the peak current in the
recifiers within reason. This often involved largish (mechanically)
resistors and inductors. The spiky current shape made for more line
drop than the simple math would lead you to believe. Today a "power
factor correction" chip and the related stuff doesn't cost an arm and a
leg. These factors have gotten together to make the designers start to
use the PFC chips. Generally, the PFC section is just a simple booster.
It is non-isolated.

Indeed, the EMC requirements in this case gel with sensible design
decisions. However, there are no harmonics emission requirements for 1
kW lab power supplies. YET.

 

[gwhite]

Because your statement only holds true for a square wave operating at 100%
duty. That certainly is not the case for most of the time and probably not the
case for ANY of the time in many cases.

I think you mean 50% duty cycle. BTW, 50% duty cycle is the definition of
"square." Other duty cycles are called "rectangular," since "on sides" and "off
sides" are not necessarily equal, but which square implies. Square is a special
case of rectangular. I did assume a zero DC square wave, since we're talking
the output of a UPS. Also, I should note we are defining a "power" crest factor
since we're using RMS instead of a full-wave rectified average.

 

[Ken Smith]

Indeed, the EMC requirements in this case gel with sensible design
decisions. However, there are no harmonics emission requirements for 1
kW lab power supplies. YET.

I was using a <Name deleted> power supply in a rack mounted system. I
discovered that the fool thing made about 1V spikes from corner to corner
on its chassis when running. ie: with the lid on, if you grounded the
scope to the back of the metal cover and probed the front of the very same
chunk of aluminum, you'd see the spike.

The frequency content of this noise would drift around until it landed in
the bandwidth of interest.

Even without a government action, there is a limit to the emissions. It
is when the thing you are trying to run won't operate if the supply is on.

 

[John Woodgate]

I read in sci.electronics.design that Ken Smith

Even without a government action, there is a limit to the emissions. It
is when the thing you are trying to run won't operate if the supply is
on.

Presumably that spike wasn't associated with mains harmonics, but your
statement is correct. 'Auto-EMC' can be quite a problem with compact
designs, especially with mixed technologies as well.

 

[Ken Smith]

I read in sci.electronics.design that Ken Smith


Presumably that spike wasn't associated with mains harmonics, but your
statement is correct. 'Auto-EMC' can be quite a problem with compact
designs, especially with mixed technologies as well.

The switcher was about a 100KHz "constant frequency" design. At light
loads it had all sorts of subharmonic oscillations and chaos. At heavier
loads it was true PWM. It had an "EMI filtering power entry module" at
the back and another chassis ground connection near the front so a lot of
the switcher's return current flowed through the sheet metal.

The design in question could only be compact in the most generous use of
the term. It was a 2 foot tall 19 inch rack which had a lot of air space
inside. The rack helped to conduct the noise to where it was least
welcome as racks always will.

 

[Terry Given]

Ken Smith wrote:




Something just occured to me as being the sort of thing I should
already know; during the 0V periods, is the output high impedence
as one would expect with minimum FETs, or is there an extra set of
FETs that clamp it to 0V? If it is high impedence, I would expect
some interesting waveforms as the inductance of the load drives
the line. If it is clamped to 0V, it would be interesing to see
hopw they derive that 0V in single phase hot/neutral systems where
the bottom trace is zero volts relative to earth/ground.

little APC UPS' use a push-pull LV primary. During the 0V time, both
FETs are switched on.

Cheers
Terry