Impedance of two stage amplifier

[OrangeArav]

Hello, I need a clarification regarding the overall gain of multi-stage amplifier and finding equivalent resistances seen by capacitors. Let's consider the ckt below:

When I tried to figure out the overall gain, Av as:

I considered RL1 as R11 + R10; however, from the solutions my answer is incorrect and the correct RL1 is R11 + Rin2. I have my solution attached below. Now, can I always assume that the RL1 will be the resistor between the two stages, here it is R11, plus input impedance of stage 2 regardless of how the connection from R11 is made? Also, one of the questions asked to calculate the pole due to C4 capacitor (between the two stages). Will this capacitor see R1+R11+R10 or Rin2 instead of R10, even though it is connected to R10?

P.S. my small signal model might be drawn incorrectly, so feel free to comment on the proper way of drawing it for two stages.

 

[The Electrician]

Your life has been simplified by the fact that the two stages have identical DC conditions. It looks like you have calculated gm to be .018 A/V, and the output conductance ro of the FETs is ignored.

Also, I assume that Rin2 is the resistance seen at the source of each FET. The resistance seen at the source of each FET is more than just the source resistor; the FET also contributes a parallel component to the resistance seen at the source of each FET--this is Rin2 for the second stage.

Your large equation has some items that are not defined, such as Rin1, Rsig1, Rsig2, Rout2 and RL2. Even though I could probably figure out what they are, it is good practice for you to specify them so that people who attempt to help don't have to waste time figuring them out. You also have a resistor labeled R5 in your model for the first stage, but there is no R5 in the circuit.

The load on the first stage is not just R11+R10; you need to call it R11+Rin2. You should analyze a single stage and determine the value of the resistance seen at the source of an FET--it's 400 ohms in parallel with the contribution from the FET.

 

[davenn]

not sure if your common gate arrangement on the second stage will work ?

 

[Arouse1973]

Um yes Dave. A 5K driving a 400 Ohm?

 

[davenn]

Um yes Dave. A 5K driving a 400 Ohm?

is that a Yes, it will work ?
I was less worried about the resistor values and more interested in the connection point to the FET
never seen one connected like that before ?

 

[The Electrician]

is that a Yes, it will work ?
I was less worried about the resistor values and more interested in the connection point to the FET
never seen one connected like that before ?

It will work just fine, although it's more often used in RF work: https://en.wikipedia.org/wiki/Common_gate

In the OP's circuit, the second stage actually has voltage gain greater than one, unlike the first stage.

 

[The Electrician]

Um yes Dave. A 5K driving a 400 Ohm?

Things are way worse than that. The 5k is not driving 400 ohms. It's driving 400 ohms in parallel with the input resistance at the source of the FET, which is a lot lower than 400 ohms.

This whole amplifier is totally useless for anything other than an exercise problem.

 

[dorke]

not sure if your common gate arrangement on the second stage will work ?

You are correct, it will not work as intended,the gate bias is wrong, a cap is missing !
Here it is corrected:

 

[OrangeArav]

Hello guys, thanks for the helpful feedback! The problem is to always see the input impedance of stage 2 as the load of stage 1 regardless. I'm posting my solution to the problem at hand just to finish it off and I also have a couple other questions coming

Spoiler: Two-stage problem

My 2nd question is about the ckt below:

The questions ask to find the input impedance, output impedance and the overall gain, Av. My confusion is about how to handle the current source when calculating the input impedance and the overall gain. Referring to my work below, I'm stuck at handling the current source to give the proper KVL or KCL equations. I assumed that there is merely a Vin voltage drop on R1 because when I did source transformation on Iin connecting Iin*R1 in series with R1 I got the wrong answer. When figuring out Av, I got confused as well. If anyone could point me in the right direction that would be great, as well explain a method for current sources to solve Av without computing Av0 first, would be great.
P.S. These problems must be done by hand, so unfortunately simulation is not an option.

Spoiler

.

 

[dorke]

"Now, can I always assume that the RL1 will be the resistor between the two stages, here it is R11, plus input impedance of stage 2 regardless of how the connection from R11 is made?"

Of course not!
The way RL1 is connected matters.
look ,here it is parallel :

 

[dorke]

Here is a "simple" way to look at things.
First note that the first stage isn't "common source" due to non-bypassed R4.

KVL-loop 1
Vg1=Vin*(R2||R3)/(R1+R2||R3)
loop 2
Vs1=R4*gm1*Vgs1

Vgs1=Vg1-Vs1=Vin*(R2||R3)/(R6+R2||R3) -R4*gm1*Vgs1
Vgs1(1+R4*gm1)=Vin*(R2||R3)/(R6+R2||R3)
Vgs1=Vin*[(R2||R3)/(R6+R2||R3]/(1+R4*gm1)
Vin=vgs1*(1+R4*gm1)/[(R2||R3)/(R6+R2||R3)]

for no load:
loop 2
Vout1=Vd1= -gm1*Vgs1*R1

Av1=Vout1/Vin= -gm1*Vgs1*R1/[Vgs1*(1+R4*gm1)/[(R2||R3)/(R6+R2||R3)]

Av1=-gm1*R1*(R2||R3) / [(R6+R2||R3)*(1+R4*gm1)]
Looking at the output as a voltage source((current is also possible) with serial resistance.
we get:
Vout1=Vin*Av1
Rout1=R1

 

[dorke]

Hello guys, thanks for the helpful feedback! The problem is to always see the input impedance of stage 2 as the load of stage 1 regardless. I'm posting my solution to the problem at hand just to finish it off and I also have a couple other questions coming

Spoiler: Two-stage problem

My 2nd question is about the ckt below:

The questions ask to find the input impedance, output impedance and the overall gain, Av. My confusion is about how to handle the current source when calculating the input impedance and the overall gain. Referring to my work below, I'm stuck at handling the current source to give the proper KVL or KCL equations. I assumed that there is merely a Vin voltage drop on R1 because when I did source transformation on Iin connecting Iin*R1 in series with R1 I got the wrong answer. When figuring out Av, I got confused as well. If anyone could point me in the right direction that would be great, as well explain a method for current sources to solve Av without computing Av0 first, would be great.
P.S. These problems must be done by hand, so unfortunately simulation is not an option.

Spoiler

.

What model are you using for the Tr.?
The Pi model has vbe in it not ib?

 

[The Electrician]

Here is a "simple" way to look at things.
First note that the first stage isn't "common source" due to non-bypassed R4.

KVL-loop 1
Vg1=Vin*(R2||R3)/(R6+R2||R3)
loop 2
Vs1=R4*gm1*Vgs1
.
.
.
Av1=-gm1*R1*(R2||R3)/(R6+R2||R3)/(1+R4*gm1)
Looking at the output as a voltage source((current is also possible) with serial resistance.
we get:
Vout1=Vin*Av1
Rout1=R1

You have R1 where you should have R6. This error carries through to the last expression.

 

[The Electrician]

Hello guys, thanks for the helpful feedback! The problem is to always see the input impedance of stage 2 as the load of stage 1 regardless. I'm posting my solution to the problem at hand just to finish it off and I also have a couple other questions coming

You're not carrying enough digits in your calculations. You got Av = -.007987. If I carry out the multiplication of all those terms with more digits I get:



Some of your intermediate quantities also should have been calculated with more digits. If I do this I get:



This is the correct result to 5 decimal places. Writing an admittance matrix for the entire circuit and solving gives the same result:

 

[The Electrician]

My 2nd question is about the ckt below:

The questions ask to find the input impedance, output impedance and the overall gain, Av. My confusion is about how to handle the current source when calculating the input impedance and the overall gain. Referring to my work below, I'm stuck at handling the current source to give the proper KVL or KCL equations. I assumed that there is merely a Vin voltage drop on R1 because when I did source transformation on Iin connecting Iin*R1 in series with R1 I got the wrong answer. When figuring out Av, I got confused as well. If anyone could point me in the right direction that would be great, as well explain a method for current sources to solve Av without computing Av0 first, would be great.
P.S. These problems must be done by hand, so unfortunately simulation is not an option.

Given that the input is a current and the output is also shown as a current, I would have thought they wanted the current gain, Ai, rather than the voltage gain, Av. Which is it?

 

[dorke]

You have R1 where you should have R6. This error carries through to the last expression.

thanks,
It should be R6 indeed.

 

[OrangeArav]

Given that the input is a current and the output is also shown as a current, I would have thought they wanted the current gain, Ai, rather than the voltage gain, Av. Which is it?

Correct, indeed the question asks for the overall current gain, Ai.

 

[OrangeArav]

What model are you using for the Tr.?
The Pi model has vbe in it not ib?
View attachment 23126

Both are valid models for the BJT:

Spoiler: Betta, ib

Spoiler: gm,vbe

 

[OrangeArav]

Given that the input is a current and the output is also shown as a current, I would have thought they wanted the current gain, Ai, rather than the voltage gain, Av. Which is it?

Now, the question is how can we find Ai without converting the current source into a voltage source? Do we need to do that always? If not, what is the procedure for finding Rin, Rout, overall gain, when there is a current source for a BJT? Circuits are hunting me back...

 

[dorke]

Current source cascades, are not much different than voltage source cascades:
when you drive an amp with a current source you need to use current dividers (parallel) instead of voltage dividers (series) and multiply the chain like you did for voltage sources.

Rin, Rout are calculated the same the only difference:
an ideal current source has Rint=infinity.
an ideal voltage source has Rint=zero.