Spectrum analyser Equalizer project how to go about it?

[danadak]

I would start with example project :



1) Set device to correct target part number
2) Config 1 chan of filter



3) Input a 1V sine, and vary it over freq range while observing DAC pin output, to
verify filter working.

4) Modify filter to add use of SAR, eg. replace delsig :

ADC_SAR - Filter - VDAC streaming demo using DMA

Hi, In the previous post it was shown how to use DMA with DelSig-ADC and Filter (PSoC5). DelSig_ADC - Filter - VDAC8 streaming demo using DMA Provided below is similar project, but utilizing ADC_SAR instead of the DelSig-ADC. Provided below are 3 projects: 1...

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5) Write code to detect peak value coming out of filter, eg. the data being sent to VDAC. Note keep
the VDAC in design temporarily so you can monitor filter output with a scope for test purposes. You
will not use it / need it in final design.

6) Start working on setting up 2 channel digital filter

7) Create a 16 bit SIPO shift register component for driving LEDs

8) Write code to find peak value coming out of filter and translate that into
shift register bit values to show magnitude of frequency component.

The basic approach.

Regards, Dana.

 

[danadak]

okay so say I have the PSoC chip and software, where do I start in making my 15 columns and 30 rows react to music input from red and white RCA connection? do I place a filter at increments from 16kHz evenly down to 32Hz? whats that about bandwidth?

Each board will / should support two channels, two frequencies. So its your call where
to place the filter frequency points that you want. As you suggest an even spacing
over the range you want to do.....

Not sure about you bandwidth question, what you are referring to ? If bandwidth
of filter obviously you dont want, or do you, overlap ? You can experiment with that,
maybe some overlap would make a smoother transition in display.....?

Not to confuse you but thought I should bring this up :

Laslty consider the following, is it possible to use one board to do all channels,
sampling / multiplexing the Digital Filter component from one freq to the next
to examine the input ? Post that question, once you do the training videos and
initial look at IDE, over at the infineon PSOC 5LP community forum..... Note that
solution obviously saves HW but generates latency in processing......Alternatively
I still think one can run a FFT on an ARM part, and just look at the bin numbers for
harmonic strength and drive the LEDs off that. For another day.

How to implement FFT on a PSoC5lp

We’re designing a BPM counter. Audio is already coming into the PSoC but we need to do the FFT so we can calculate the Beats per minute. We found the CMSIS pack but we haven’t been unable to put it into creator 4.2 any help will be greatly appreciated thank you

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Programmable Digital Filter

I am working on a small project that causes holiday lights to flash in time to user specifiable frequency bands of music. I have a working prototype that uses an ADC, a Filter Bank, a DAC, and comparators. But there is a problem. I can manually program the filter bank for any kind of...

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FFT in Cortex M0

Hi All, I guess few of you would like to implement FFT in PSoC4. I have attached a PSoC Creator project which does the same. I have computed 64 point FFT and the CPU consumes around 634.7us to perform the operation. This has been done completely through firmware. Regards, Asha

community.infineon.com

If you are going to do a commercial product give this a serious consideration.


Regards, Dana.

 

[Maglatron]

by bandwidth I think I mean from what frequency range will light up a certain column and where it overlaps to the next I want not much overlap so that the output is more crisp can I start learning without having the chip yet is there simulations I can run that will show on the graph like the one you posted can that simulate the ups and downs with multiple frequencies at the same time?

 

[Maglatron]

for examples more channels to be set up at the same time

 

[Maglatron]

which software should I choose out of these?

 

[danadak]

PSOC Creator

for examples more channels to be set up at the same time

So its clear each board will only support 2 channels if you go the filter approach.
So you take the example project that does 1/2 the DFB block to create 1 channel,
and essentially dupe the code base to do the other channel in the DFB.

If you do the FFT approach one board would be used to run the FFT, and then
use one board/4 channels to do the LED I/O, eg. 4 16 bit shift registers configed
from verilog or schematic capture custom, create your own, 16 bit SIPO shift register.


Regards, Dana.

 

[Maglatron]

Okay I'll put it simply because I don't understand. Will the PSoC chip be able to drive 15 columns and 30 rows through the use of red and white RCA jacks and display the different band frequencies on the led matrix with the going higher up the led bar graph with increase in decibel???

 

[Maglatron]

So now I have installed cypress can I achieve this effect???

with this chip??? when you metion channels do you mean the red and white from the RCA jacks

 

[danadak]

Lets restart with a couple of questions :

You have a 15 x 32 matrix you want to display. You are thinking LED. Here is an
approach that has the driver and led for each element in one package, and each
element addressable. You buy them in strips the # elements you need.

https://d2j2m4p6r3pg95.cloudfront.net/module_files/led-cube/assets/datasheets/WS2812B.pdf

This approach allows easy interface to most processors. Thats simple to do because its
addressable, no muxing needed. Because you are addressing them in code. You do need a
demux to select which row is active to get the data being sent, in PSOC thats easy, it
has a demux to send data and clk to correct row.

Or you could use a LCD graphic panel, and thru code create a matrix display
onscreen. That would take a intelligent panel and an interface, which PSOC has, to drive.

So are you constrained to LEDs or open to LCD panel ? What physical size of display ?


I was focused heavily on the filtering problem (my error, should have paid more
attention to matrix as well). OpAmp solutions have problems with accuracy and drift,
whereas if a FFT is run its clock accuracy accurate. And basically code based. So
one part/processor can generate effectively all the filters needed because thats what
a FFT does, gives you freq versus amplitude as output data. The challenge in an FFT
is update rate because its computationally intensive in processor speed needed. Here
is a discussion about doing this.

So output is an array of real and complex number, you compute the square root of the sum of
squares of that, that = magnitude. The position in the sample array, the row, is the frequency
controlled by size of array and sample rate. So you collect N samples, then send to FFT,
and it gives you freq vs magnitude essentially.

FFT in Cortex M0

Hi All, I guess few of you would like to implement FFT in PSoC4. I have attached a PSoC Creator project which does the same. I have computed 64 point FFT and the CPU consumes around 634.7us to perform the operation. This has been done completely through firmware. Regards, Asha

community.infineon.com

I would post at Infineon to see if anyone has done a compelete CMSIS solution
you can download.

Note the PSOC still relevant since you need A/D and a LPF in front of it to prevent aliasing.


Regards, Dana.

 

[danadak]

So now I have installed cypress can I achieve this effect???

with this chip??? when you metion channels do you mean the red and white from the RCA jacks

Channels in your design is the frequency colum, 1 Khz column is a channel.....

 

[Maglatron]

30 upwards 15 sideways to the right it will look like this and the dimentions equal 76.2mm (height) 153mm (wide) to do the project the way I want I need then theses are the ones I need to use (LED)

 

[Maglatron]

what do you mean by channels?

PSOC Creator



So its clear each board will only support 2 channels if you go the filter approach.
So you take the example project that does 1/2 the DFB block to create 1 channel,
and essentially dupe the code base to do the other channel in the DFB.

If you do the FFT approach one board would be used to run the FFT, and then
use one board/4 channels to do the LED I/O, eg. 4 16 bit shift registers configed
from verilog or schematic capture custom, create your own, 16 bit SIPO shift register.


Regards, Dana.

 

[Maglatron]

I'm struggling to understand this can the PSoC chip support the 15 frequency channels and then each channel react to decibel because the chips cost over £25, if you are suggesting that the chip can only support 2 channels then it's not feasable for expence to be honest. Is there another way that I can get the same effect for cheaper?

Cypress Semiconductor - CY8CKIT-059 - Psoc 5lp Usb Dev Board | eBay

Kit Contents: Dev Board CY8C5888LTI, Quick Start Guide. Silicon Manufacturer: Cypress. Silicon Core Number: CY8C5888LTI. Micro-USB header for creating prototypes with full speed USB 2.0 connectivity. Core Sub-Architecture: Cortex-M3.

www.ebay.co.uk

 

[danadak]

So 15 frequencies (channels) with a amplitude 0 - 30.

Is display a ready made part or one you will make out of discrete
leds ? If former link to data sheet.

 

[Maglatron]

I'm getting 5 lots of these
https://www.ebay.co.uk/itm/191750934970 and building them into a display, because I need 45 bar graph LED's so I will have 5 left over. Each unit has 10 LED's in them!

 

[danadak]

I'm struggling to understand this can the PSoC chip support the 15 frequency channels and then each channel react to decibel because the chips cost over £25, if you arsuggesting that the chip can only support 2 channels then it's not feasable for expence to be honest. Is there another way that I can get the same effect for cheaper?

Cypress Semiconductor - CY8CKIT-059 - Psoc 5lp Usb Dev Board | eBay

Kit Contents: Dev Board CY8C5888LTI, Quick Start Guide. Silicon Manufacturer: Cypress. Silicon Core Number: CY8C5888LTI. Micro-USB header for creating prototypes with full speed USB 2.0 connectivity. Core Sub-Architecture: Cortex-M3.

www.ebay.co.uk

Thats if you use filter approach. The FFT approach one chip. One issue is that low cost
board does not have enough I/O on it to do the array, you would need a board with more
I/O. But for proto purposes the 059 board will do to implement fewer columns for test.


Regards, Dana.

 

[Maglatron]

ok so which board would suffice to be able to use the filter approach and what's the difference between FFT and filter approach? thanks

 

[Maglatron]

Thats if you use filter approach. The FFT approach one chip. One issue is that low cost
board does not have enough I/O on it to do the array, you would need a board with more
I/O. But for proto purposes the 059 board will do to implement fewer columns for test.


Regards, Dana.

But for proto purposes the 059 board will do to implement fewer columns for test is this for the FFT aproach or filter approach?

 

[danadak]

A driver has to be done in Verilog to handle the array. This works, but better way would be
to do it in verilog. Below uses onchip resources, as would Verilog solution



You would need NPN transistor for each column to handle the 31 LED amount of potential
current into it. Note PSOC is limited to on segment current, q00 mA per port of 8 pins.


Difference between filter and FFT :

Filter we need a filter solution for each channel (frequency) and can only do 2 / PSOC
chip.

FFT we take a bunch of samples, then run the FFT analysis on the sample set, Its computationally
intensive, large latency = lower update rate of display, but I think doable. This is a test you would
clearly work out, resolution of FFT in frequency versus update rate, its a tradeoff. I am not expert here,
learning myself, but have downloaded and compiled a FFT example project.

I think preferred method here is FFT by far, just have to test out / code actual set of freqs.


Regards, Dana.

 

[Maglatron]

ok so going back to the analog version and comparing with the FFT digital version, the analog one has the ability to add more frequency easily but the overlap because of bandwidth and this gives a smooth transition between bars and the FFT cypress version, you program the frequencies in, but need to have more computational power and it has a slower responce time. ok so now once it's ringing the correct bar how do you control the hight of the bars, and you mentioned that I'll have to make use of transistors aswell can you explain more about that please?
What does "onchip" mean