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  1. V

    built in self test

    vlsi circuit also contain additional test circuit , circuit that allow to test their own operation by itself I am looking about information what is built in self test can someone explain little bit with example
  2. V

    oxidation in fabrication

    silicon die oxide layer is formed on the surface of silicon wafer by the oxidation process oxidation process oxidation method dry oxidation wet oxidation dry oxidation Si+O2 -.> Sio2 wet oxidation Si+2H2O -> Sio2+2H2 dry and wet oxidation are the type of thermal oxidation or thermal...
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    type of fault in vlsi circuit ?

    VLSI design customer requirement specification functional design at register transfer level using some hardware language (verilog , vhdl ) fault or error detect by functional simulation next step logic design functions are decompose into gate level logic simulation error is detect by...
  4. V

    type of fault in vlsi circuit ?

    Q1 when does we do testing after manufacture or before start up circuit Q2 chop is not working we don't know what is fault what is process to determine fault I mean which method we will use step by step ? 1. path sensitization 2. D algorithm 3. full scan & partial scan 4 built...
  5. V

    type of fault in vlsi circuit ?

    I understood testing is used to determine fault in chip fault may be occur during fabrication , during connection , during packaging Q1 If fault is present in component , which testing method we will use to detect fault ? Q2If fault is present in interconnection , which testing method we will...
  6. V

    type of fault in vlsi circuit ?

    VLSI design are automated customer requirement specification functional design (by using hardware description language ) digital design (using gate level model ) circuit level (using gate are implement using transistor ) layout design fabrication process ( layout is convert into real chip )...
  7. V

    type of fault in vlsi circuit ?

    I am little bit confused about fault , fault model , and testing fault - component fault , circuit fault fault model - delay fault, stuck at fault testing - testing for component , testing for circuit connection can you explain little bit all three things in vlsi system
  8. V

    type of fault in vlsi circuit ?

    you did not understand actually what I am asking when we make chip It may be work or it may be fail due to some fault chip may be fail due to fabrication process chip may be fail due to circuit connection chip may be fail due to packing how we will detect fault in chip and what is fault...
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    type of fault in vlsi circuit ?

    How many type of fault can be occur in VlSI circuit ? my effort physical fault during manufacturing process circuit fault during interconnection packing fault Q1 does anyone know another fault ? Q2 what is fault model and why does we need in vlsi circuit?
  10. V

    embedded program

    I also don't understand, this is exam question I have to write requirement and specification for embedded program I have searched on google but I did not find good material example - we write program on compiler , assembler we write different code for different purpose like lcd , led , dc...
  11. V

    embedded program

    thanks lot for big help I know little bit about microcontroller , compiler and assembler I have written some program on assembler for LED , motor lcd display I have completed project but I am having problem with following question Q1 what is specification for embedded program
  12. V

    diffusion and ion implantation in fabrication

    look at this definitions Is it correct ? Ion implantation and diffusion both process is used to add impurity into wafer surface Diffusion is process by which atom of material are deposited on to the surface of wafer at high temperature Movement of atom form source to wafer at high...
  13. V

    embedded program

    Embedded system design there are two method to design embedded system design 1. using micro controller on development board 2. using micro processor and memory and other device Q1. when does we use micro processor and micro controller in embedded system Q2 what is embedded program ? embedded...
  14. V

    mos operation regions

    transistor are either on (saturated) or off (cutoff). so what happen when transistor in linear mode transistor will be on or off
  15. V

    mos operation regions

    there are three regions of operation in mos transistor 1. cut off 2. linear 3.saturation consider cmos Inverter circuit Input is high -> output is low pmos in cut off -> nmos in linear Input is low -> output is high pmos in linear ->nmos in cut off I am having problem to understand last...
  16. V

    how to achieve desired delay time in cmos inverter

    I am not going to design real chip. I just want to learn method, how does chip design I have made temporary specification for inverter If you want to see I can post here
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    how to achieve desired delay time in cmos inverter

    suppose we are designer and our inverter circuit need 215 ps delay time If I know following thing then can I achieve desired delay time 1.power supply 2.threshold voltage for nmos 3.threshold voltage for pmos 4.load capacitance how to think and what should we know to achieve 215 ps delay as...
  18. V

    how to achieve desired delay time in cmos inverter

    can anyone explain little bit how to achieve delay time
  19. V

    how to achieve desired delay time in cmos inverter

    what should we do to achieve specific delay just for example ( 215 ps) I think I need following thing but its not all I am missing some 1.power supply 2.threshold voltage for nmos 3.threshold voltage for pmos 4.load capacitance please anyone tell me what should we do to achieve 215 ps delay
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