yes you are correct It was my mistake
now transformer connected to half wave rectifier circuit with 50 ohms load
I want to determine dc output current and dc output voltage
output dc current Idc= 44/50= 0.88 dc current
how to determine output dc voltage ?
I think it will be 44 volt dc
look at this in another
transformer connected with 50 ohms load
primary voltage Vp= 220 RMS ac
secondary voltage Vs= ?
primary turns Ns = 5
secondary turns Np= 1
primary current Ip =?
secondary current Is ?
formula
Vp/Vs=Ip/Is=Np/Ns
for secondary voltage
Vp/Vs= Np/NS
220/Vs=5/1
Vs =...
transformer connected to half wave rectifier circuit with 50 ohms load
given
primary turn Np = 5
secondary turn Ns=1
peak voltage Vp= 220
load Rl= 50 ohms
find out unknown value
primary voltage ?
secondary voltage ?
I dc current ?
I ac current ?
peak current ?
my effort
formula...
I have google .actually I have seen two type of code, one where we write only equation and other where we put some binary value. I don't understand which one code is true why we use two type of code to write verilog code
if you can tell me the difference its good for me. I will do next step. I...
verilog code for half adder
there are two type of code
module half_adder (a,b,sum,carry);
input a;
input b;
output sum;
output carry;
assign carry=a&b;
assign sum=a^b;
endmodule
and other code
module halfaddert_b;
reg a;
reg b;
wire sum;
wire carry;
ha uut (...
please check out this verilog code for D flip flop
module d_flipflop (d,clk,q,q1);
input d;
input clk;
output q;
output q1;
reg q, q1;
always @ (posedge clk);
initial
begin
q = d ;
q1=~d;
end
endmodule
when I don't use initial statement. I show error. what is use of initial statement
I don't understand what is meaning of embedded computing system design
embedded system is combination of hardware and software that perform some specific task
does embedded system and embedded computing system is different things ?
Q what is embedded system design process ?
built in self test - ability of circuit to test itself
example memory bist, logic bist
scan technique used in design for testing
JTAG controller
full scan , partial scan
both scan and bist used additional test circuit for purpose of testing
I want to know how scan techniques are different...
YES I tried
modular - the code is separated into small functions
fault tolerant - being able to handle faults
configurable - means run time configurable
power optimized- when no task are running processors have a low power state which can be used in a kernel
I am having problem to understand some statement
kernel is not modular,
kernel is not fault tolerant ,
kernel is not configurable
kernel is not power optimized
can anyone explain little bit ?
I am looking information about wafer making equipment I have read some thing
wafer preparation
material for wafer preparation
raw material - silicon is raw material
MGS metalluragical grade silicon
EGS electron grade silicon
wafer making equipment
crucible
pure silicon is placed in...
i have doubt that which type of material we used in VLSI technology
silicon raw material is silicon sand or silicon gas
sand -> silicon gas - reactor -> poly-silicon -> electronic grade silicon -> cz method -> wafer
I think sand is raw material from earth It convert into silicon gas , then...
scheduling is process by which operating system decide which one task will be next on processor
scheduling determine the order in which task are executed
different os kernel may use different scheduling algorithm
scheduling algorithm
First Come First Serve (FCFS) Scheduling...
I am little bit confused about derivation for boltzmann equation for electron
boltazmann relationship describe transport of free carrier in semiconductor
look this links
http://relativity.livingreviews.org/...ticlesu25.html
http://en.wikipedia.org/wiki/Boltzmann_equation
I don't understand...
ok look this table
I don't understand the output value of circuit
how to determine output of decoder and demultiplexer
decoder truth table
A1 A0 D3 D2 D1 D0
0 0 0 0 0 1
0 1 0 0 1 0
1 0 0 1 0 0
1 1 1 0 0...
I need some help to understand truth table
1 to 2 demultiplexer
input I
select line S
output D0, D1
I S Do D1
0 0
0 1
1 0
1 1
how to determine D0 and D1 by boolean expression ?
2 to 4 decoder
A is the address and D is the dataline
A1 A0 D3 D2 D1 D0
0 0
0 1...