- Joined
- Nov 28, 2011
- Messages
- 8,393
That's a lot better. I would avoid the track from pin 6 on the top side. I can't see the copper on the bottom layer but I assume it duplicates the copper on the top.
It's a number of years since I did any PCB layout so I'm pretty rusty on the details. I'm working on my own layout for the Allegro chip area which I may upload sometime.
What size are the via holes in that area? 30 thou would be fine; probably 24 would be no problem too. You could find out in advance from your intended PCB manufacturer.
Personally I use 15 thou tracks and 10 thou clearances for general signal routing unless the layout is tight, and this gives a very manufacturable board.
It's a number of years since I did any PCB layout so I'm pretty rusty on the details. I'm working on my own layout for the Allegro chip area which I may upload sometime.
What size are the via holes in that area? 30 thou would be fine; probably 24 would be no problem too. You could find out in advance from your intended PCB manufacturer.
Personally I use 15 thou tracks and 10 thou clearances for general signal routing unless the layout is tight, and this gives a very manufacturable board.
