Nobody should be without a function generator.
I know there are chips that you can use, but it is still good to learn how these things work.
The stand alone chips have very limited output power and the lower spec parts may have quite high sine wave distortion.
Here is a design I did using one of my previous posted ideas. That is the triangle to sine converter based around Q1.
http://www.electronics-lab.com/forum/index.php?topic=7405.msg59625#msg59625
Well in short, U1,2 is a comparator-integrator combination to provide square and triangle wave outputs on pin 1 and 7. Frequency is set in 3 ranges with R6 and (C1,2,3). R8 set the output level of the triangle wave to 8Vp-p at pin 7(U1B). Due to resistor tolerances, R8 might need slight adjustment to set the level at 8Vp-p on this pin. This level is important to get lowest sine distortion from Q1.
This triangle wave is then converted by the circuit around Q1 to a sine wave output at about 2Vp-p. R3,5 will be adjusted for minimum sine wave distortion. The values indicated in (%) were the settings for minimum distortion during simulation.
U2 plus D3,4,5 and Q2,3 forms a low distortion output stage. This output is capable of driving 10Vp-p into 600 Ohm load or around 8Vp-p into a 50 Ohm load. R11 will adjust the output level. Output stage distortion is only 0.002% at 20kHz with 10vp-p into 600 Ohm. The figure with 8Vp-p into a 50 Ohm load is 0.087%
Switch J1 when opened allows us to set the DC offset of the output. In the closed-cal position, the offset will be very close to 0V.
Design shows good performance with sine wave distortion only 0.7% THD at 20kHz
Up to 2kHz, distortion is about 0.35% THD, and then rising slowly to the 0.7% mark at 20kHz.
Although this circuit as a whole was only tested on a simulator, I have previously verified performance of the tri-sine converter and the output stage design on a bench with actual measurements.
Waveforms show the simulated results to expect at 20,200Hz and 2,20kHz.
From the table of %THD we see that the design perform well with 50 and 600 Ohm loads.
I know there are chips that you can use, but it is still good to learn how these things work.
The stand alone chips have very limited output power and the lower spec parts may have quite high sine wave distortion.
Here is a design I did using one of my previous posted ideas. That is the triangle to sine converter based around Q1.
http://www.electronics-lab.com/forum/index.php?topic=7405.msg59625#msg59625
Well in short, U1,2 is a comparator-integrator combination to provide square and triangle wave outputs on pin 1 and 7. Frequency is set in 3 ranges with R6 and (C1,2,3). R8 set the output level of the triangle wave to 8Vp-p at pin 7(U1B). Due to resistor tolerances, R8 might need slight adjustment to set the level at 8Vp-p on this pin. This level is important to get lowest sine distortion from Q1.
This triangle wave is then converted by the circuit around Q1 to a sine wave output at about 2Vp-p. R3,5 will be adjusted for minimum sine wave distortion. The values indicated in (%) were the settings for minimum distortion during simulation.
U2 plus D3,4,5 and Q2,3 forms a low distortion output stage. This output is capable of driving 10Vp-p into 600 Ohm load or around 8Vp-p into a 50 Ohm load. R11 will adjust the output level. Output stage distortion is only 0.002% at 20kHz with 10vp-p into 600 Ohm. The figure with 8Vp-p into a 50 Ohm load is 0.087%
Switch J1 when opened allows us to set the DC offset of the output. In the closed-cal position, the offset will be very close to 0V.
Design shows good performance with sine wave distortion only 0.7% THD at 20kHz
Up to 2kHz, distortion is about 0.35% THD, and then rising slowly to the 0.7% mark at 20kHz.
Although this circuit as a whole was only tested on a simulator, I have previously verified performance of the tri-sine converter and the output stage design on a bench with actual measurements.
Waveforms show the simulated results to expect at 20,200Hz and 2,20kHz.
From the table of %THD we see that the design perform well with 50 and 600 Ohm loads.
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