Help needed regarding Vertex2 FPGA

[vinaypv]

i'm currently working on Vertex-II FPGA using simulink to dump program onto it.. But FPGA automatically assigns the input & output pins for the given simulated input.. so can anyone please give info for finding the assigned pins by simulink or custom assignment of pins..
please its urgent..

 

[NickS]

Sorry that is not my thing. Welcome and I hope you are able to find assistance here.

 

[55pilot]

If everyone posted to every thread informing that they can not help, the site is going to grind to a halt!

What software are you using to do the design? If you are using the Xilinx software, you need to include a UCF (user constraint file) that associates nets in the design to specific pins, specifies the voltage levels and clock frequencies.

When i hear "it is urgent" my first thought is that it is for a class assignment.

---55p

 

[(*steve*)]

To be fair, NickS did say "welcome" to a first time poster.

However I would tend to discourage posts like that for a different reason -- Seeing a thread with responses it's fair to thing that someone is helping.

Perhaps a private message to say welcome would be better

Oh, and welcome vinaypv.