JFET Mic Pre Advise Please

[evengravy]

"Why have you insisted on a non-standard value for R1"
basically I am a little confused as to bias the fet correctly, my take on it from my reading was to aim for a figure close to the measured Idss of the measured device (gate and source connected and voltage applied with no signal) with a 50ohm source resistor the drain resistor value to bias close to 0v just happened to be 8.5k. I think I can choose a standard resistor value close to this value without significant change to the bias.

"4.332mA through Q1 seems too high"
maybe i'm measuring the current incorrectly. I'm measuring from Q1 drain to ground, is this correct. current measured is 4.322mA (18.5v at drain) which is close to the Idss value I have measured for the Fet.

oscilloscope measurements of the amplified output are swinging about 0 almost perfectly, with and without the source follower section attached so I took this to mean my biasing was at least somewhere close to being correct.

"add a couple of diodes between Q3's base and 0V"
ok, what type of diodes would be suitable for this application? and would you add two in series?

sorry for so many questions, i really appreciate your help.

View attachment 40853

 

[Hero999]

"Why have you insisted on a non-standard value for R1"
basically I am a little confused as to bias the fet correctly, my take on it from my reading was to aim for a figure close to the measured Idss of the measured device (gate and source connected and voltage applied with no signal) with a 50ohm source resistor the drain resistor value to bias close to 0v just happened to be 8.5k. I think I can choose a standard resistor value close to this value without significant change to the bias.

The drain should ideally be biased at half the supply voltage to allow as greater swing as possible. In practise it doesn't have to be exact, it just needs to be far enough from either of the supply rails to avoid clipping. For example if the drain is biased at 2V, the negative cycles will clip when the peak voltage exceeds 2V.

"4.332mA through Q1 seems too high"
maybe i'm measuring the current incorrectly. I'm measuring from Q1 drain to ground, is this correct. current measured is 4.322mA (18.5v at drain) which is close to the Idss value I have measured for the Fet.

How can the drain current be 4.3mA? If it is the drain voltage will be 36-4.2*8.5 = 0.3V.

Q4 shouldn't make any difference because the base current will only be about 6.3

 

[evengravy]

I thought you calculated current by the following:
(I = Current/V=Voltage/R(t)=Resistance Total)
I = V / R(t)
I = 36/(8.5 + .060)
I = 36/8.56
I = 4.2(mA)
this is close to the value i'm measuring in the simulation also, so now i'm really confused.

 

[Hero999]

I thought you calculated current by the following:
(I = Current/V=Voltage/R(t)=Resistance Total)
I = V / R(t)
I = 36/(8.5 + .060)
I = 36/8.56
I = 4.2(mA)
this is close to the value i'm measuring in the simulation also, so now i'm really confused.

Where did you get 0.06 from?

I assume, it's the value of R3.

You haven't included the voltage between Q1's drain and source in your calculation.

The current through Q1 is dependant on the gate-source voltage, the lower the gate voltage (relative to the source) the lower the current. The value of 4.2mA is the typical value assuming a gate voltage of 0V. Adding a source resistor will pull the gate voltage down below the source, therefore reducing the drain current.

I roughly estimated the current by looking at the datasheet and the value of R3.
http://www.synthdiy.com/files/2008/2sk117.pdf

With a gate voltage of -0.1V the drain current will be 1.5mA which would be the case if you used a 66.67Ω resistor for R3. As you've used a slightly lower value for R3, the current will be slightly higher. I guessed 1.6mA but maybe it'll be slightly less, the exact value isn't important as it will vary from transistor to transistor and as the temperature changes.

With a drain current of 1.6mA the drain voltage will be 36-8.5*1.6 = 22.4V

How are you simulating this?

What model are you using? Is it just a generic JFET?

 

[evengravy]

im simulating with multisim 10 with a specific 2sk117gr model, which are the ones I have.

some voltages of circuit in no signal condition
Q1
drain voltage is around 17.3V.
gate sits at 20.2mV
source 133mV

Q4
base 17.3V
collector 36v
emitter 16v

Q3
base 7.5v
collector 16v
emitter 6.81v

i've took a print screen of probe measurements from throughout the circuit. I wonder if the multimeter in multisim draws current? im using a probe this time and seem to be getting different values.

View attachment 40854

 

[Hero999]

Good, the voltages and currents are within the expected ranges.

Q1's drain current is 2.2mA. a bit higher than I predicted but it's reasonable.

The drain voltage is 17.3V which is roughly equal to 36-2.21*8.5 and is perfect as it's nearly dead on half the supply voltage.

This means that your JFET stage should work perfectly.

The only problem is your output stage will burn out, as I said before the, current through Q4 and Q3 is far too high. The power dissipated by Q 4is 1.35W which exceeds its maximum rating of 625mW.

P = (36-16)*0.0675 = 1.35W
http://www.fairchildsemi.com/ds/MM%2FMMBT6427.pdf

It needs reducing to a much more sensible level, otherwise it will overheat.

As I said before, adding two silicon diodes between the Q3's base and 0V will reduce the current to around 6mA which is much more sensible: if this is too low to drive the load then increase the value of R5 to increase the current.

I'm still not sure you see my point about the circuit not requiring precision resistors. Try substituting the resistors for the nearest E24 values and you'll see that it makes very little difference to the circuit's characteristics: replace R3 with 62R and R1 with 8k2 and the circuit will still work just as well, it'll just be cheaper to make. Of course you should still use metal film resistors not carbon film, all I'm saying is that 5% tolerance is more than good enough.

The input is still DC coupled when it should really be AC coupled, especially if you're using a condenser mic. as the input impedance is really high you can use a small capacitor, I'd recommend a 1nF film capacitor. Don't use ceramic which can cause distortion and is piezoelectric which is microphonic.

 

[evengravy]

thanks a lot for this i'm glad i have at least biased correctly and i will work on the current draw on Q4 and post updates as/if required,

you've been a massive help cheers

 

[evengravy]

I know it has been a while since I posted on this circuit but I have been flat out with other projects until now,

so, I have modified the circuit to include diodes between the base of Q4 and ground as you suggested and this has reduced the current to just below 6ma,

I'm not sure how to simulate for output impedence, It will need to drive a 600ohm load max (i think around 75Ω @1kHz)

how would I go about simulating for this, I have been searching online for answers but I can't seem to find any relative info.

any help is greatly appreciated,

also the ac coupling hasn't been added as I intend to incorporate a transformer on the input, I will get to changing this and the bias resistor values soon.

View attachment 40939

 

[audioguru2]

Origionally, the circuit had a high output current so it could drive a fairly low inpedance load. Now its current is much less so it cannot drive a fairly low impedance load.

Its input impedance is 10M ohms so why ruin it with an input transformer?

 

[Hero999]

Origionally, the circuit had a high output current so it could drive a fairly low inpedance load. Now its current is much less so it cannot drive a fairly low impedance load.

Originally the circuit had such a high bias current that Q4 was overheating, now the bias current is lower so Q4 will no longer overheat.

To drive a lower impedance load a class AB stage should be added. It's a silly idea to use a class A amplifier like this to drive a low impedance load.

 

[evengravy]

so, if i understand what you're saying correctly I need to increase current through q4 such that it can drive the low impedance load but such that it is low enough so as it wont overheat. Is this correct?

I have no idea how to go about running output impedance simulation, I am using multisim.

also in regard to the input transformer, I understand that the input impedance is high with the jfet input, but i'm unsure how to add phantom power using dc blocking capacitors, this is why I thought a transformer would be easier, but i'll scratch that idea.

thanks guys.

 

[evengravy]

I think I may have been wrong with the output impedance values that I posted, basically the circuit (well two in series will make up the mic pre) will need to be suitable for connection to a line level mixer, after some more reading it seems as if "The impedance of the line input is high -- about 10K to 1 Meg ohms" http://www.tape.com/resource/impedance.html

 

[Hero999]

Your circuit is fine for driving a 10k load - leave it as it is.

 

[evengravy]

thanks again hero999,
even

 

[evengravy]

audioguru: "its input impedance is 10M ohms so why ruin it with an input transformer"

I really need to make this ciruit balanced and add to add phantom power, which is why I thought of adding a transformer, is there another simple way of achieving these functions without the input transformer?

I know that it is possible to add dc blocking caps to allow phantom power to be blocked from entering the input, but is there a way to work with the balanced input that emulates the transformer function.

even.

 

[Hero999]

I don't see why it needs to be balanced.

AC coupling is normally used to block the DC as you correctly suggested.

A transformer will just ruin it, as mentioned above.

Ballancing is normally done usign a differential amplifier which would need a matched pair of FETs in this case as you don't want to use an op-amp.

 

[audioguru2]

Condenser mics are balanced and are fed 48VDC to polarise the diaphragm.
Dynamic mics are also balanced.

A mic preamp used an input transformer about 30 years ago but now they use an electronic circuit.

 

[evengravy]

"A mic preamp used an input transformer about 30 years ago but now they use an electronic circuit."

Yea, I understand what you mean but there is a certain tonal advantage to using a transformer also, I see what you are saying about the impedance, adding a transformer would be wasting the high input impedance of the Jfet,

If I were to choose a transformer however what specs would be suitable? impedance in/out and ratio

however, in order to achieve the electrical balancing, could I use similar spec matched jfet pair (2SK-369) and the same circuit doubled, one circuit for positive input and one for the negative? then merely add phantom power and dc blocking caps to the input?

 

[audioguru2]

Most modern condenser mics have a balanced 600 ohms output so using fets at the preamp is useless. An input transformer in the preamp might pickup hum and has poor low and high frequency response. A transformer saturates at high levels. Input transformers might not be available anymore (remember Jensen?).