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Plants Watering Watcher-2 by Audiguru


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Hi all my friends, i miss you all, it is good to back

In the Fig.plants1 shown below there is a part of the circuit, this part is the IC1-C work as 2 Hz osc. As the author said.
Pin 10 is connected to 3v Vcc
R3 = 3.9M
R4 = 100K
C4 = 220n
D1 = any small signal diode
The designer wants that the cap C4 charged through R3 and discharged through (R3//R4 = approx R4).
As I understood (may be wrong) the purpose of using this osc. is only to save batt (for more info look at: http://www.electronics-lab.com/projects/science/018/index.html)

If you don't worry about power supply you can omitt this part because it has no real function in the main circuit.

To calculate the charge time Tc = 1.1 R3 C4 = 943.8 msec
                  The discharge time Td = 1.1 R4 C4 = 24.2 msec
The total period = approx. 1 sec
So, frequency = 1Hz

I know the picture is not so simply, Audioguru did not calculate it like this, his frequency = 2 Hz and he said that: "IC1C is another CMOS Schmitt trigger oscillator at about 2Hz. D1 and R4 discharge C4 quickly so that its output is low for only about 15ms with a 3V battery, and about 25ms with a 2V battery."

From this we conclude that we must take the supply voltage into account; that is the higher this voltage the faster the charging and discharging process.

This looks like filling the same tank, first using 2 hp pump then by using 3 hp. But the question still in my mind is how to calculate these times taking voltage value into account.

After receiving a satisfactory answer I'll discuss more parts of this professional circuit.
Yours,
Walid.

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Hi Walid,
Your formula is for an ordinary Cmos oscillator. A Cmos oscillator with a Schmitt trigger has a different formula. A Cmos Schmitt trigger switches when its input voltage is fairly close to zero volts while an ordinary Cmos oscillator switches when its input voltage is close to half of the supply voltage. The formula is modified a lot by the diode since with a low supply voltage then there is a lower current in the resistor in series with the diode to discharge the capacitor slower.

A Cmos Schmitt trigger oscillator (without the diode) has a frequency that is very affected by its supply voltage. Its frequency can change about 10:1 when its supply voltage is changed from its min to its max ratings.

I didn't calculate values for my oscillator, I just used my experience and the parts that I had.

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Hi all

Now I can move to another part of this complex (at least for me) circuit:
In Fig. plants2 shown below I cut this part of the circuit because I think that this is a stand-alone osc.
In his description, Audioguru did not tell us that gate IC1-B is a stand-alone osc, he said that this is a NAND gate.
I'm not sure that this osc. does not affected by neighbor parts connected to it (as shown in Fig. Plants3), but at this moment lets start with Fig.plants2.
Tc = Td = 1.1 R1 C1 = 1.1 * 470K * 1n = 0.517 msec
So, time period = 1.034 msec ~ = 1msec
frequency = 1KHz (if we take guru's last fotmula we get another value)
Now if you look at Fig.plants3, you may notice that I omit the two probes and write on R8 that its value change from few ohms to 47K according to the state of the moisture content.
From this figure we see that the designer connect his osc. (IC1-B) to NOT gate (IC1-A) and this combination works like this:
When there is a 0 at the o/p of the osc. (pin 6), then 1 appears at pin 3, so cap C3 charge through R2 only and the R8 resistor connected in parallel with the C3.

post-2833-1427914277316_thumb.jpg

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In Fig. plants2 shown below I cut this part of the circuit because I think that this is a stand-alone osc.
In his description, Audioguru did not tell us that gate IC1-B is a stand-alone osc, he said that this is a NAND gate.

Sorry, I got my text mixed up. IC1-B is a 2kHz oscillator and IC1-D is a NAND gate.

Now if you look at Fig.plants3, you may notice that I omit the two probes and write on R8 that its value change from few ohms to 47K according to the state of the moisture content.
From this figure we see that the designer connect his osc. (IC1-B) to NOT gate (IC1-A) and this combination works like this:
When there is a 0 at the o/p of the osc. (pin 6), then 1 appears at pin 3, so cap C3 charge through R2 only and the R8 resistor connected in parallel with the C3.
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Hi audioguru, thank you for everything

(1) If we ignore, for a moment, the formula you gave me later to calculate freq, and concentrate on the statement you told me:((A Cmos Schmitt trigger switches when its input voltage is fairly close to zero volts while an ordinary Cmos oscillator switches when its input voltage is close to half of the supply voltage.))
    Looking at the word "half", I notice that this is the key to solve one problem. all the time I calculate the freq and get answer = half yours, so I can conclude that: The freq of an ordinary Cmos oscillator 1/(1.1RC) while for A Cmos Schmitt trigger oscillator, f = 2/(1.1RC), that is the time is half and the freq is double.
    Is this approximation is accepted by you?

(2) If C3 charges and discharges through R8 (and the equivalent resistance of the soil in parallel), why we need R2 (=100K)? i think it has no function!

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(1) If we ignore, for a moment, the formula you gave me later to calculate freq, and concentrate on the statement you told me:((A Cmos Schmitt trigger switches when its input voltage is fairly close to zero volts while an ordinary Cmos oscillator switches when its input voltage is close to half of the supply voltage.))
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I agree with you that R8 reduce the max resistance between the probes, but R2 is not.
R2 do another job, I think its function is as follows:
Assume R8//soil resistance is very low, say 100 ohm (moisture content is very high)
Our main ocs. changes its state every 250 micro sec (f=2KHz)
If logic 1 is at pin 6 then logic 0 will appear at pin3, this will last for 250 micro sec
Now at this situation, current will flow from pin6 through R8 to:
1) Charge C3
2) Pass through R2 to the virtual ground pin 3

If we omit R2, then C3 will be fully charged in 1.1*100ohm*1n = 0.1 micro sec 
let it 1 micro sec, this is very small time compared to the 250 micro.
This means that pin 13 of the NAND gate will be low only for 1 micro sec from the 250 micro sec.
BUT if we let part of pin 6 current to flow through another pass, then we slow the rate of charging C3 and gain more time

I know that the designer said, the led must be dark when the moisture content is high, but what i said will be more clear when the moisture content become low and R8 high.

I can conclude that if we carefully choose R8 and C3 we can then omit R2.
What audioguru say?

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Hi all

you are not respond to my last question, so i'll do more efforts to simplify
the picture to myself, but still need your help.

The table shown below is a cut and eddit from the datasheets of MC14093B.
From this table I understand the following:
When Vcc = 5 vdc, this gate considers (typically) any input voltahe down to
2.9 vdc as logic 1, and any input voltahe up to 1.9 vdc as logic 0

Questions:


(1) Is the above true?
(2) There are three values related to the threshold voltage, min typ and max,
    which one to rely on?
(3) the table show three values for Vcc; 5 10 and 15 vdc, what can i do if
    my vcc = 7 volts dc?
(4) In the same datasheets, not shown in the table below, i found what is
    called Hysteresis voltage, its value is 1.1v at vcc =5v, 1.7 at vcc = 10v
    and 2.1 at vcc=15v. what this means and how can be used?

the 2nd step is to use the above info with some exponentioal expressions
related to capacitor to discover how exactly the charging process and the
rate at which voltage developed between its plates.

then I'll see how the R2 (as apart of voltage divider) isfunctioning in the
whole circuit. I'll get the datasheets of 74HC132 and study it carefully
and do all the calculations needed to understand how this circuit works.

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you are not respond to my last question, so i'll do more efforts to simplify
the picture to myself, but still need your help.

Sorry, Walid. I am doing my income tax and my son's. Also, it is springtime and I have gardening to do.

The table shown below is a cut and eddit from the datasheets of MC14093B.
From this table I understand the following:
When Vcc = 5 vdc, this gate considers (typically) any input voltahe down to
2.9 vdc as logic 1, and any input voltahe up to 1.9 vdc as logic 0

Correct for this ordinary Cmos Schmitt trigger gate, but 74HCxx gates are a little different.

Questions:

(1) Is the above true?

Yes.

(2) There are three values related to the threshold voltage, min typ and max,
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