R
robb
- Jan 1, 1970
- 0
i think i may not be clear ?That doesn't sound odd as pin 1 would be A15 on the next
size up ROM.
i am saying pin 1 and pin 27 of the memory chip are connected on
the controller board so that would cause special consideration if
one wanted to use a 27c512 ?
OK, so that's not the problem.
Have you looked at a hex dump of the ROM? Perhaps
it didn't really enabel the ROM when reading it and you
"read" all FF or something like it from the original ROM and
it programmed your new EPROM with that.
close , it is a series of sections of 64 duplicate bytes
followed by another section of 64 duplicate bytes..... all the
waty to the end
each section of byte values is different and i get the exact
same series for each successive chip reading attempts.
unless i choose a different chip size like 27c128 then the series
of byte duplicates changes. where the first set maybe 7A in place
of the 02
here is a clip from begining of my read
:020000040000FA
:1000000002020202020202020202020202020202D0
:1000100002020202020202020202020202020202C0
:1000200002020202020202020202020202020202B0
:1000300002020202020202020202020202020202A0
:100040000202020202020202020202020202020290
:100050000202020202020202020202020202020280
:100060000202020202020202020202020202020270
:100070000202020202020202020202020202020260
:10008000D9D9D9D9D9D9D9D9D9D9D9D9D9D9D9D9E0
:10009000D9D9D9D9D9D9D9D9D9D9D9D9D9D9D9D9D0
:1000A000D9D9D9D9D9D9D9D9D9D9D9D9D9D9D9D9C0
:1000B000D9D9D9D9D9D9D9D9D9D9D9D9D9D9D9D9B0
:1000C000D9D9D9D9D9D9D9D9D9D9D9D9D9D9D9D9A0
:1000D000D9D9D9D9D9D9D9D9D9D9D9D9D9D9D9D990
:1000E000D9D9D9D9D9D9D9D9D9D9D9D9D9D9D9D980
:1000F000D9D9D9D9D9D9D9D9D9D9D9D9D9D9D9D970
:10010000E6E6E6E6E6E6E6E6E6E6E6E6E6E6E6E68F
:10011000E6E6E6E6E6E6E6E6E6E6E6E6E6E6E6E67F
:10012000E6E6E6E6E6E6E6E6E6E6E6E6E6E6E6E66F
:10013000E6E6E6E6E6E6E6E6E6E6E6E6E6E6E6E65F
:10014000E6E6E6E6E6E6E6E6E6E6E6E6E6E6E6E64F
:10015000E6E6E6E6E6E6E6E6E6E6E6E6E6E6E6E63F
:10016000E6E6E6E6E6E6E6E6E6E6E6E6E6E6E6E62F
:10017000E6E6E6E6E6E6E6E6E6E6E6E6E6E6E6E61F
:1001800039393939393939393939393939393939DF
:1001900039393939393939393939393939393939CF
:1001A00039393939393939393939393939393939BF
:1001B00039393939393939393939393939393939AF
:1001C000393939393939393939393939393939399F
:1001D000393939393939393939393939393939398F
:1001E000393939393939393939393939393939397F
:1001F000393939393939393939393939393939396F
:1002000013131313131313131313131313131313BE
:1002100013131313131313131313131313131313AE
:10022000131313131313131313131313131313139E
:10023000131313131313131313131313131313138E
:10024000131313131313131313131313131313137E
:10025000131313131313131313131313131313136E
:10026000131313131313131313131313131313135E
:10027000131313131313131313131313131313134E
:100280001E1E1E1E1E1E1E1E1E1E1E1E1E1E1E1E8E
..... till the end
Mask ROMs can have additional chip selects (if pins are
available) and these can be (mask programmed) to select
on high or low. There may or may not be an OE (possibly
just the chip select(s)).
I mapped the pins on the board so as to be reasonably certain
that the ROM chip was compatible with the 27cXXX series of chips
all the pin/address/data lines seem to be consistent with the
27cXXX series pin out. the data and address lines match to the
MCU adressing pins according to 27cXXX datasheet even the funny 8
through 11 pin jumble.
(pin 22) ROM goes to (pin 29) 8051 (PSEN- prog store enable)
(pin 20) ROM goes to (pin 30)8051 (ALE-Addr Latch Enable)
on the PCB the 8 data lines are all connected with the first 8
Address lines
so D0 is connected to A0 and (D1 to A1) and these shared
connection s all go back to MCU
It's a 28 pin chip and has to have gnd, Vcc, 8 data,
15 address so that leaves 3 pins. The eprom
has CE, OE, and Vpp; the ROM might have
3 more chip selects or some number of chip selects
plus OE?
It sounds solvable...
thanks for the help,
robb