Jump to content
Electronics-Lab.com Community


  • Posts

  • Joined

  • Last visited


Recent Profile Visitors

The recent visitors block is disabled and is not being shown to other users.

Cuckoo's Achievements


Newbie (1/14)



  1. Very interesting article Ante, thanks. I'm sure Bardeen and Brattain would't have imagined this in their wildest dreams! ::)
  2. Hi You may have already built that 5V supply but... I recently found some ready made very easy to use switching regulators made by Texas Instruments (Powertrends to be more specific). They do operate at 24V, have outputs of 5V, as you need, and adequate output currents. What is even better is that you can have free samples of them. Check out PT5100 (5V/1A) or PT4142 (5V/4A), You may look at TI's site under: Analog and Mixed signal -> Power management -> Plug-in power modules and find the regulator that suits you best.
  3. Sure there is current before 0,7V! As you see in the equation the built-in voltage depends on doping (and temperature) so you can play with it to some extent by controlling the doping. Not to mention that electron-hole recombination is a statistic phenomenon and therefore when you say 0,7V it does't mean that there is no current at all at lower voltages. As for the depletion region, it can not be significantly reduced or disappear. It exists there because you put two differently (p and n type) doped semoconductors together. And yes, it can be extended when you reverse bias the junction You can take a look here to find a well written and more descriptive approach: http://hyperphysics.phy-astr.gsu.edu/hbase/solids/semcn.html
  4. Hi Kevin In a pn junction in equilibrum, where p and n regions "touch", majority carriers from each region recombine with majority carriers from the other region. That is: free electrons from the n region recombine with holes in the p region and holes from the p region recombine with free electrons in the n region. A depletion region is thus created. In the depletion region there are no "mobile" carriers. The diffused holes leave behind uncovered fixed negative charges and similarly there are fixed positive charges left behind by the diffused electons. In this way, a separation of charges occurs, causing an electric field (- is in the p region and + in the n region). This electic field is called built-in potential and has the opposite polarity of the battery when you forward bias the junction. It is given by: Vbi=VTln[(NdNa)/ni2 ] where: Vbi is the built-in voltage VT is the thermal voltage for Si (26mV/deg C) Nd and Na is the concentration of doping atoms in the n and p region respectively ni is the intrinsic carrier concentration in Si This potential is constant, has a value of 0,7V approximately for Si diodes and normal doping (depends on doping and temperature), and you have to overcome it in order to have a current flow through the junction. This is practically what you measure and call forward voltage drop. When you bias the diode you do have an electron current and practically you create an electric field opposite to the built-in voltage. When the electric field you apply equals or exceeds the built-in voltage, your diode conducts.
  5. Hi all We all know that due to its indirect band-gap, silicon is not a suitable semiconductor to manufacture optoelectronics. Having a Silicon light source (LED or LASER) though, would come in very handy in today's technology, especially in telecommunications. There is a decade or so that electroluminescence and photoluminescence have been observed from porous Silicon. Reseach has been re-stimulated quite recently when initially photoluminescence and later electroluminescence was observed in structures containing Silicon nanocrystals. Contrary to porous Silicon, silicon nanostructure devices ARE FULLY compatible with today's CMOS processes. This means that the cost of combining the drive electronics (silicon) and light source (composite semiconductors) is practically eliminated, allowing in a few years the full integration of these two components and other optics as well (waveguides, modulators, etc.) to be possible, giving a new direction in the evolution of electronics. ST has already produced a LED based on Er-ion doped Si nanocrystals. A nice presentation of the subject, is by Intel here: http://www.intel.com/technology/itj/2004/volume08issue02/art06_siliconphoto/p01_abstract.htm and you may as well perform a google serach, you'll find many relevant pages.
  6. Hi all. well Kevin it is not exactly like that. Normally you build counters using flip flops. According to how you will connect the clocks of your flip flops, you can get a sync. or an async. counter. You have a syncronous counter when all clock inputs of the flip flops are connected to a single, common clock. An asynchronous counter uses each flip flop's clock differently. You may want to take a look at this page for more details and some examples: http://www2.ele.ufes.br/~ailson/digital2/cld/chapter7/chapter07.doc5.html As for advantages and disadvantages, each counter fits in different applications and therefore I don't think you could make a comparison between them. In general you put sync. counters in synchronous systems and asynchronous in async. systems (these are the faster ones btw., but are more complex to design)
  7. Hi dtsormpa If you haven't found it already, all the necessary information to do this is here: http://www.erd.epson.com/vdc/html/contents/S1D13504.htm There are many interface examples with 16-bit microprocessors. Ok, it's for the S1D13504 but I guess driving the rest of the controllers of the family will be more or less the same.
  8. Hi everyone. Power MOSFETS do consist of many little MOSFETS connected in parallel. These are called "cells". For given die dimensions, companies will try to fit as many cells as possible (they connect in parallel so as to drop the drain - source resistance), while keeping a reasonable gate capacitance. What changes between companies is the cell structure (almost every company has patented their own - VMOS, SIPMOS, HEXFET etc), which will finally determine the gate capacitance as well. As for how the "gate capacitance" charges, it does so pretty much like a capacitor (the structure metal/polysilicon - SiO2 - Si, IS a capacitor), but does not follow exactly the curve. That's because there are other parasitic capacitances (gate - source, gate - drain, gate - body etc.) which also charge giving a slightly different curve. You might want to check out here: http://www.powerdesigners.com/InfoWeb/design_center/articles/MOSFETs/mosfets.shtm for a more descriptive presentation on the topic.
  • Create New...