12V - 350V 200mA converter for motorcycle CDI

[KrisBlueNZ]

View attachment 15012

That's exactly right.

 

[abuhafss]

That's exactly right.

Okay, I'll try and report you.

Your devoted style of explanation is really appreciated. Bundle of thanks.

 

[KrisBlueNZ]

I would stop the Royer oscillator by adding two NPNs (e.g. BC547, 2N3904) on the TIP41 transistors. Each new transistor has its collector connected to the base of one TIP41 transistor, and its emitter connected to 0V. The bases of these new transistors are each connected through a 3k3 current limiting resistor to a common point, which you drive positive to kill the Royer oscillator.

When the control point is positive (at least +2V), both of the new transistors will turn ON and will pull the bases of both TIP41s down to 0V, turning them OFF and reducing the Royer oscillator's current to about 55 mA (the current drawn by the two 470Ω resistors).

Your devoted style of explanation is really appreciated. Bundle of thanks.

I appreciate that. That's a nice thing to say

 

[abuhafss]

In the meantime, may I dare to ask, just for clarification:

What is the drawback of using 555 in astable mode + mosfet + EE transformer?
Frankly, I had tried that and got about 310 - 315VAC. And yes, the mosfet was getting warm (not hot); maybe due to unsuitable duty cycle and/or frequency.

 

[KrisBlueNZ]

To keep the inductor's physical size reasonable, you need to run the converter at a much higher frequency. The 555 is not good at that. Its output is not really strong enough to drive a big MOSFET quickly and cleanly either. The circuit wastes significant voltage (0.7V) in the current shunt resistor. These are the main reasons I can tell you about, but there are probably many other reasons as well; I don't have enough knowledge of SMPS design to be able to give any more details.

 

[abuhafss]

To keep the inductor's physical size reasonable, you need to run the converter at a much higher frequency. The 555 is not good at that. Its output is not really strong enough to drive a big MOSFET quickly and cleanly either. The circuit wastes significant voltage (0.7V) in the current shunt resistor. These are the main reasons I can tell you about, but there are probably many other reasons as well; I don't have enough knowledge of SMPS design to be able to give any more details.

I wasn't talking about the SMPS circuit with inductor, the other thread.
I am asking about 555 astable + mosfet/darlington + EE step-up transformer.

 

[KrisBlueNZ]

I don't remember seeing any circuit that uses a 555 and a transformer. AFAIK the only circuits using a 555 were in the other thread, and they used an inductor.

 

[abuhafss]

I don't remember seeing any circuit that uses a 555 and a transformer. AFAIK the only circuits using a 555 were in the other thread, and they used an inductor.

Sorry to confuse you, here is what I am talking about. I had used mosfet with 100Ω resistor............the output was 315V. The mosfet got pretty warm probably because of inappropriate duty cycle and/or frequency.

 

[KrisBlueNZ]

OK, that's a Darlington transistor, not a MOSFET. But you used a MOSFET? What type number? And you used a 100Ω resistor instead of the 10k resistor in the drive signal? Some information on the transformer core would be good too! Or at least an inductance figure.

 

[abuhafss]

OK, that's a Darlington transistor, not a MOSFET. But you used a MOSFET? What type number? And you used a 100Ω resistor instead of the 10k resistor in the drive signal? Some information on the transformer core would be good too! Or at least an inductance figure.

I used P75N75 which was the 1st available in my mosfet box.
Yes I replaced 10K with 100Ω.

Transformer 20mm x 18mm x 5mm
Primary 22T = 75μH
Secondary 140T = 2.85mH

 

[KrisBlueNZ]

With those values the 555 will oscillate at around 60 kHz with a duty cycle of around 60%. This corresponds to a MOSFET ON time of about 10 µs and an OFF time of about 7 µs.

That MOSFET is rated for 75V V_DS, 11 mΩ R_DS(on), 76 nC gate charge and 5 nF gate capacitance.

"Pretty warm" is probably around 50 °C, or about 30 °C above ambient. Assuming you don't have a heatsink on the MOSFET, that corresponds to about 0.4W dissipation.

That circuit is a flyback converter and the secondary connection must be arranged so that current is delivered to the load when the MOSFET is OFF and the magnetic field in the transformer is collapsing. This means that assuming the primary and secondary windings are phased the same, i.e. the top ends of both are in phase, this means that the top end of the secondary must connect to the cathode of the rectifier, with the anode connected to the output capacitor, which will be charged to a voltage that's negative relative to 0V. Alternatively, the primary and secondary must be phased opposite from each other.

The first question is, "is the transformer core saturating?". When the switch (the MOSFET) turns ON and the power supply voltage is applied across an inductor, current in the inductor builds linearly as more and more energy is stored in the magnetic field in the core. When the field reaches a certain strength called B_sat, which depends on the inductor core material, shape, size etc, the inductor core starts to saturate. Current starts to increase rapidly, and is only limited by the DC resistance of the circuit.

This could be the problem in your circuit, because the inductor current is not monitored. You need to ensure, by design, that the inductor will not saturate. This is especially difficult to ensure at circuit startup, because when the output voltage is low, the inductor current only falls slowly during the OFF period, and it's easy to get a situation where the inductor current ratchets up during every ON period until saturation is reached. This is an important issue for you because the converter will be "starting up" up to 200 times per second!

You can detect inductor saturation by connecting a small current sense resistor between the MOSFET source and 0V and connecting an oscilloscope across it. A value of 0.1~0.47Ω would be reasonable. Don't use a wirewound resistor though; they are inductors as well! You may see a positive spike when the MOSFET turns ON at the start of the ramp; this is due to the gate-source capacitance being charged by the 555 output and can be ignored.

Apart from inductor saturation, causes of MOSFET overheating could be (a) simple ON-resistance losses, (b) breakdown due to high drain-source voltage during flyback, or (c) switching losses. My knowledge on this subject is not good. Steve could shed some more light here. But I'll start with what I (think I) know.

ON-resistance losses are just the result of current flow in the MOSFET, which causes voltage to be dropped across the MOSFET's internal drain-source ON-resistance. When properly saturated, that device has an ON-resistance of only 11 mΩ, and it's only ON for 60% of the time. 0.4W for 60% of the time corresponds to about 0.7W and from I² = P / R, I (current) would have to be 8A RMS to cause that much heating.

Every time the MOSFET turns OFF, the transformer will generate a back EMF voltage. Normally this voltage will be mostly clamped by the secondary and the output capacitor, although this clamping is not perfect at the MOSFET drain because of the leakage inductance in the transformer. But if you don't have a rectifier and output capacitor connected, there won't be any clamping happening at all. The back EMF voltage at the primary will surely be higher than 75V, the maximum rated voltage of the MOSFET, and if it causes the MOSFET to break down, this will cause it to heat up. No doubt it will also cause degradation of the MOSFET and probably eventual failure. This voltage is normally clamped by a network consisting of a high-speed diode and a resistor in series, often with a capacitor across the resistor.

Switching losses are caused by the fact that the MOSFET does not switch instantaneously from ON to OFF or vice versa. While the MOSFET is fully ON, its power dissipation is low because there's almost no voltage across it; when it's fully OFF, its power dissipation is low because there's almost no current flowing through it. But when it's changing between those states, there is significant voltage across it, and significant current flowing through it, so the power it dissipates (which is calculated as P = V × I) is significant.

This switching period must be kept as short as possible, and this is done by driving the gate with a strong signal that is able to charge and discharge the inherent gate capacitance very quickly.

This is an area I know little about, and I can't estimate the power dissipation in the MOSFET due to switching losses for you. But you can reduce switching losses by using a MOSFET driver IC in between the 555 and the MOSFET gate. These ICs can drive several amps of current into the gate to turn the MOSFET ON very quickly, and suck several amps out of the gate to turn it OFF very quickly. (*steve*) knows about this stuff, and if you need to know more, you could PM him with a link to this post, and ask him to advise.

 

[(*steve*)]

Firstly, thanks Abuhafss for the PM directing me to this thread.

Kris has covered almost everything, leaving a very small, but hopefully useful part for me.

The first thing you need to did are the following

• Qg - the total gate charge of the mosfet
• Rg - the value of your gate resistor
• Vgs(th) - the threshold voltage of the mosfet
• L - the inductance of your inductor
• Vdd - the power supply voltage
• f - the switching frequency
• d - the duty cycle. I.e. 0.25 if the mosfet is operating for 250ms each second. If the device operates constantly, or if the on time exceeds a few seconds, use 1
• Vgg - the voltage the gate is driven from. This is often Vdd.
• Vss - use zero here. It will be our reference
• Vgg0 - the voltage the gate is clamped to when turning the mosfet off. Unless you have a separate voltage rail this is typically Vss
• T(on) - the minimum turn on time for the mosfet
• T(off) - the minimum turn off time for the mosfet

OK, so the gate current to the mosfet when turning it on will be:

Ig(on) = (Vgg - Vgs(th))/Rg​

The gate current when turning the mosfet off will be:

Ig(off) = (Vgs(th) - Vgg0)/Rg​

This is based on the fact that the gate voltage rises to approximately Vgs(th) and remains there until the gate capacitance is charged. If you are using a gate driver with a specified gate current (and no gate resistor), use this for Ig(on) and Ig(off).

The turn on time will be:

T(on) = Qg / Ig(on) -- If this is less that the datasheet value of T(on), use the datasheet value​

The turn off time will be:

T(off) = Qg / Ig(off) -- If this is less that the datasheet value of T(off), use the datasheet value​

We will assume that the current through the inductor is given by:

I_L = 1/(f * L)
​

If you have a better estimate for I_L then use that.

We will also assume a constant inductor current. This is false, but errs on the side of caution (usually)

The power lost in switching is:

Ps = f * (T(on)/2 + T(off)/2) * I_L * (Vdd - Vss) * d (edit -- not *d!)

I'm pretty sure I must have written "* d" originally meaning "* f"

 

[KrisBlueNZ]

That's great Steve! Thanks for the explanation. I have a few questions though.

I think there's a number missing from your equations - the gate voltage at which the MOSFET saturates. AFAIK, Vgs(th) is the gate voltage at which the MOSFET starts to conduct, but there is also another voltage, higher than Vgs(th), where the MOSFET is conducting so hard that the linear part of the switching action has finished and the conduction loss becomes the only factor.

You say that when the driver output goes high, the MOSFET gate voltage jumps quickly up to Vgs(th) then sits at that voltage until the gate capacitance has been charged, and the time for this is determined by Qg / Ig. But during this time, surely the gate voltage is increasing steadily towards the other threshold I mentioned? And during that time, the drain circuit is transitioning between no current flow into the MOSFET, through the linear region, to minimum voltage across the MOSFET? And the same in the other direction?

Have you just approximated those two voltages to be the same thing? If so, wouldn't it be better to use a voltage somewhat higher than Vgs(th)? Or I may be missing something.

Second, the actual power dissipation calculation is going to be a lot more complicated than that formula because it depends on the actual nature of the progression of the drain-source resistance or drain-source current. Towards one end of the linear region, the drain-source circuit will approximate a current sink, and towards the other end, it will approximate a resistance, right? The shape of the power dissipation waveform will be pretty complicated and hard to estimate, I think. And the interaction with the inductor will be complicated too. Or will it actually be simplified by the fact that in the short term (and switching is short term), the inductor is actually just a constant current source?

Third, I think your use of duty cycle may be misleading. The 555 oscillator is running at a 60% duty cycle and that is the operating duty cycle of the MOSFET, but that's irrelevant to the power dissipation. The duty cycle you're talking about is the proportion of the time that the MOSFET is being switched, vs. the proportion of the time when it's either permanently ON or permanently OFF (probably permanently OFF), right? That doesn't happen in a boost converter except when the output voltage reaches the regulation target, right? And it's just a separate factor that can be easily bolted onto the equation if it's relevant, right?

Finally I don't understand how the switching loss can be expressed as an amount of power if the switching frequency isn't known. Each transition through the linear region should cause a defined amount of energy loss, not power loss. That can be converted to a power figure if the number of transitions per second is known, but that figure isn't in the formula, as far as I can see.

Thanks again and please enlighten me further

 

[KrisBlueNZ]

Another thing. Is there a penalty if you drive the MOSFET gate voltage higher than the value needed to saturate the MOSFET? (I know that saturation can't be clearly defined with a MOSFET, just as it can't be with a BJT.) What I'm thinking is that if you charge the gate capacitance up to a higher voltage than you need, you are wasting energy in your driver by doing that, and you're also wasting energy in your driver when you need to discharge the gate capacitance through that voltage range before it starts to turn OFF. That would also delay the start of turn-OFF (although that isn't important in this application).

Or does the gate capacitance only have an effect when the gate voltage is between those threshold voltages, and on either side of the transition area, can the gate voltage change much more quickly?

 

[(*steve*)]

That's great Steve! Thanks for the explanation. I have a few questions though.

I think there's a number missing from your equations - the gate voltage at which the MOSFET saturates. AFAIK, Vgs(th) is the gate voltage at which the MOSFET starts to conduct, but there is also another voltage, higher than Vgs(th), where the MOSFET is conducting so hard that the linear part of the switching action has finished and the conduction loss becomes the only factor.

If you look at the charging of the gate of a mosfet you'll find that the gate voltage reaches a threshold voltage where it stays relatively constant while charge flows into the gate. The same is true of the discharging of the gate of a mosfet (this is for the FQP50N06 -- see below for a link to the datasheet).

You say that when the driver output goes high, the MOSFET gate voltage jumps quickly up to Vgs(th) then sits at that voltage until the gate capacitance has been charged, and the time for this is determined by Qg / Ig. But during this time, surely the gate voltage is increasing steadily towards the other threshold I mentioned? And during that time, the drain circuit is transitioning between no current flow into the MOSFET, through the linear region, to minimum voltage across the MOSFET? And the same in the other direction?

See page 18 of this guide to datasheet parameters.

The first sloped portion of the graph is where the mosfet is in a constant voltage mode, and where the increase in gate voltage results in the opening of the channel. The horizontal portion of the graph is the point at which the mosfet is in a constant current condition as the channel opens still further to lower Vds. The gate voltage again starts to rise after the mosfet has essentially reached the minimum Vds. This is a reasonably adequate method of determining the gate current when the gate is driven by a voltage source via a fixed resistor. However, you can quite rightly point out that is *is* an underestimate. However, I am also overestimating the power dissipation by assuming that the full current into the inductor is being switched. In reality, unless the SMPS is operating in continuous mode, it will be zero. Even in continuous mode, the current should be less that the calculated current which is based on an almost 100% duty cycle.

Oh, it's important that you use total Gate charge for these calculations. (I just went back and checked -- I did say that -- phew)



This voltage is naturally going to vary with Id. Here is an example for a 2N7000

So the actual voltage is going to depend on a number of factors. Since turning off the mosfet is going to be the issue, rather than overcomplicating it, I decided to use a lower voltage. Note that with a gate driver capable of a given current, all of this goes away.

The question is, what voltage is this plateau at. I've suggested using Vgs(th). For that same mosfet (in this case an FQP50N06 -- picked entirely at random), Vgs(th) is given as:



And I normally suggest you use the worst case, in this case 4V is the worst case, and it is an approximation for the plateau voltage seen above. Sure, it may be better to read the value off the graph, but the graph is not always available, and reading it off the datasheet is non-trivial anyway.

Have you just approximated those two voltages to be the same thing? If so, wouldn't it be better to use a voltage somewhat higher than Vgs(th)? Or I may be missing something.

Yes. On both counts.

However when we're switching the inductive load off we have a few complicating factors.

Firstly Vds is likely to rise, increasing dissipation faster than the simple linear model predicts, and secondly any method of switching the gate to whatever voltage levels we have may not switch completely to these levels or may be current limited as it approaches them. The chosen voltage gives a bias to the "difficulty" in switching the mosfet off.

Second, the actual power dissipation calculation is going to be a lot more complicated than that formula because it depends on the actual nature of the progression of the drain-source resistance or drain-source current. Towards one end of the linear region, the drain-source circuit will approximate a current sink, and towards the other end, it will approximate a resistance, right? The shape of the power dissipation waveform will be pretty complicated and hard to estimate, I think. And the interaction with the inductor will be complicated too. Or will it actually be simplified by the fact that in the short term (and switching is short term), the inductor is actually just a constant current source?

Sure, there is a lot more variation, but we hope to include that in the slack we give by using the maximum values for gate charge, Rds(on), etc. What we want is a ballpark estimate (perhaps somewhere in the diamond rather than the entire ballpark) not to pinpoint the position of the batter. And we try to aim for closer to worst-case (so we don't hit a foul ball as it were). Enough of the baseball analogies!

Third, I think your use of duty cycle may be misleading. The 555 oscillator is running at a 60% duty cycle and that is the operating duty cycle of the MOSFET, but that's irrelevant to the power dissipation. The duty cycle you're talking about is the proportion of the time that the MOSFET is being switched, vs. the proportion of the time when it's either permanently ON or permanently OFF (probably permanently OFF), right? That doesn't happen in a boost converter except when the output voltage reaches the regulation target, right? And it's just a separate factor that can be easily bolted onto the equation if it's relevant, right?

That is correct. I tried to make that clear, but I probably failed.

Note that I also did not include Rds(on) * Id * Mosfet Duty Cycle * System duty cycle.

Also note that there are graphs which give a far better estimate of how much the fudge factor should be. Whilst not exactly discussing this, the graph of the thermal response gives you a good idea of the thermal lag in the device.


Everything converges at around t = 1 sec, so that's where I get my 1 second max from. Note that this will change for different packages, and also if a heatsink is connected. However it is not wise to push it.

Finally I don't understand how the switching loss can be expressed as an amount of power if the switching frequency isn't known.

Aaaagh! MASSIVE ERROR. Thanks, and corrected.

Each transition through the linear region should cause a defined amount of energy loss, not power loss. That can be converted to a power figure if the number of transitions per second is known, but that figure isn't in the formula, as far as I can see.

You are exactly correct. When formulated correctly you calculate the energy lost in a second which corresponds (as if by magic) to the rate of power loss

Thanks again and please enlighten me further

I hope I have corrected my errors sufficiently and explained some of the fudge factors.[/quote][/quote]

 

[(*steve*)]

Another thing. Is there a penalty if you drive the MOSFET gate voltage higher than the value needed to saturate the MOSFET? (I know that saturation can't be clearly defined with a MOSFET, just as it can't be with a BJT.) What I'm thinking is that if you charge the gate capacitance up to a higher voltage than you need, you are wasting energy in your driver by doing that, and you're also wasting energy in your driver when you need to discharge the gate capacitance through that voltage range before it starts to turn OFF. That would also delay the start of turn-OFF (although that isn't important in this application).

Or does the gate capacitance only have an effect when the gate voltage is between those threshold voltages, and on either side of the transition area, can the gate voltage change much more quickly?

That is true. You may gain in reduced losses due to Rds(on) but lose in the switching time.

However, what you really do is introduce a small turn-off delay. The initial discharging of the gate capacitance only serves to increase Rds(on) to what it might have been if you had used a lower gate voltage. From the graphs above, you can see that this additional capacitance is lower.

The effect is that the mosfet stays on longer, so you may end up with a greater overshoot in Id or output voltage, or whatever you're regulating than a greater power dissipation.

The problem may be worse if you have cycle by cycle current limiting and you saturate the core of the inductor. Your protective circuit may lose some time in trying to turn the mosfet off, possibly to a point where the mosfet is damaged. If this happens cycle after cycle then the mosfet will have a (perhaps greatly) abbreviated life.

edit: one more issue, if you're aiming for a very high duty cycle (perhaps 99.9% at a high frequency), you may get to the situation where the mosfet can't turn off before you want to turn it back on again. If you're sailing this close to the wind, the extra delay caused by the higher gate voltage is probably not the only potential straw waiting to break the back of this particular camel.

 

[abuhafss]

Thank you both of you for your detailed explanations. Appreciated!

After this heavy technical discussion , the points I concluded are:
a) Transformer saturation, if present, needs to be stopped
b) The frequency and the duty cycle need to be optimized
c) A matching mosfet should be selected accordingly

Before proceeding, I have few points/questions

I did this experiment on breadboard, a week ago. The IL was 1.3A and the output I measured (without load) simply connecting the transformer's primary to multimeter was about 310VAC.

Could running the circuit without load lead to mosfet heating up?
Isn't IL 1.3A very small as compared to mosfet's rated 85A to heat it up?

Now, from where should I resume?...............How about reducing the duty cycle?

 

[(*steve*)]

Thank you both of you for your detailed explanations. Appreciated!

After this heavy technical discussion , the points I concluded are:
a) Transformer saturation, if present, needs to be stopped
b) The frequency and the duty cycle need to be optimized
c) A matching mosfet should be selected accordingly

(a) and (c) are certainly important, (b) whilst important for effective operation probably won't result in failure as long as (a) (saturation) is prevented.

Before proceeding, I have few points/questions

I did this experiment on breadboard, a week ago. The I_L was 1.3A and the output I measured (without load) simply connecting the transformer's primary to multimeter was about 310VAC.

Do you mean 310V on the secondary? If this is actually on the primary then this is the voltage punching through the mosfet.

Firstly, if you mean solderless breadboard, then the voltages are too high, the currents too large, and the capacitance between the tracks too great, so an alternate method of breadboarding is recommended.

Could running the circuit without load lead to mosfet heating up?

If you mean without any load at all (i.e. an open secondary on the transformer), then yes. Essentially the energy pumped into the transformer in each ON ctcle will get forced through the mosfet on the off part of each cycle. If this does not exceed the maximum avalanche capacity of the device (which would kill it rapidly) it will heat the device very quickly.

If you mean with a minimal load, including a feedback circuit to reduce the duty cycle or even to stop the oscillator when the output voltage reaches a sufficient level, then no -- this is quite acceptable.

Isn't I_L 1.3A very small as compared to mosfet's rated 85A to heat it up?

Sure, but 1.3A * 12V is around 15W, so if you're getting switching losses you might have up to half of this (unlikely) lost in the mosfet. If the voltage is rising high enough on the primary (due to no load on the secondary) to punch through the mosfet, the entire 15W will be dissipated my the mosfet.

However, an important consideration is that if your current is only a couple of amps, the use of an 85A device will slow switching and increase switching losses. A mosfet with a lower current rating and a higher Rds(on) will likely have a significantly reduced Qg and thus switch faster. The higher Rds(on) will increase static losses, but you may save substantially on switching losses. In addition, boost and flyback SMPSs tend to rely on a fast turn off of the mosfet to get the highest output voltage. Your switching may be slow enough that switching losses are also contributing to a lower than optimal output voltage.

Now, from where should I resume?...............How about reducing the duty cycle?

Sorry, I've been dealing with this from the theoretical position only. I haven't looked at your circuit in detail. I would ensure that I have feedback to prevent the oscillator running when the output voltage is sufficient. If you don't have that, it may improve things significantly. Good gate drive (especially to turn the device off) and a mosfet with low Qg (total gate charge) will also likely help significantly.

Without load, the mosfet should be cool to the touch.

Of course, a heatsink will also help reduce the case temperature of the device, but the source of heating should be expected and normal. Don't try to fix the problem by just adding a larger and larger heatsink.

 

[abuhafss]

Sorry, it was 310VAC at the open secondary of the transformer, and 1.3A thru the primary. And yes it was on a solder-less bread-board.

So the first thing I should do is to reassemble and see the behavior with a load. Would a 2μF/500V capacitor be enough as load?
The output is already at the desired level (310VAC), do I still need a feedback to stop the oscillator?

Next, I should replace the mosfet with lower current rating and higher Rds(on). Can you please give me some reference Ω figure for the Rds(on)?

"Good gate drive (especially to turn the device off)" .......Do you mean, I should reduce the duty cycle?

 

[(*steve*)]

Sorry, it was 310VAC at the open secondary of the transformer, and 1.3A thru the primary. And yes it was on a solder-less bread-board.

That's better, but an open circuit secondary is generally not a good idea.

So the first thing I should do is to reassemble and see the behavior with a load.

Yes, matrix board, veroboard, or (far less likely) a printed circuit board would eliminate much of the issues that arise with the use of solderless breadboard.

Would a 2μF/500V capacitor be enough as load?

Well, you require DC, so you need a rectifier, then a capacitor (and 2uF should be OK), but none of this represents an actual load.

You could place a 10k resistor (rated at 10W or more) across the output. That would be a 30mA load at 300V.

The output is already at the desired level (310VAC), do I still need a feedback to stop the oscillator?

I would recommend it yes. Without it, the output voltage will fall as soon as there is a load placed on the circuit. Feedback allows the regulator to supply more power (possibly increasing the duty cycle of the signal to the mosfet) to compensate for this and maintain the output voltage. Without feedback it's a bit like thinking that pushing an empty car along a flat road shows you can push the same car up a steep hill while fully laden at the same speed. Clearly that won't happen, something needs to tell you to push harder!

Next, I should replace the mosfet with lower current rating and higher Rds(on). Can you please give me some reference Ω figure for the Rds(on)?

Let me go back to your circuit diagram, which I presume is somewhere earlier in the thread and look at what the circuit is, and what mosfet you have chosen. If you know the required output power, that would help greatly too as it will allow the input current to be estimated.

"Good gate drive (especially to turn the device off)" .......Do you mean, I should reduce the duty cycle?

No, this just means that the circuit which drives the gate should be capable of very strongly pulling the gate to ground. This will make the mosfet turn off faster and likely (again, I have not reviewed your circuit) improve efficiency. More efficiency means, among other things, less heat.