Logic NOT Function
- Muhammad Shahid
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Logic NOT Function
The logic NOT function’s output state is NOT the same as its input state. The logic NOT function performs the inversion function on its input and outputs complement of the input. The logic NOT function output is false when its input is true, and true when its input is false. It is the simplest logic function having a single input and a single output.
The Boolean expression of a logic NOT function is represented by overline or bar (¯) over its input. This bar or overline denotes an inversion or complement of the state or input. The logic NOT function is performed by logic NOT gates and is sometimes referred to as inverters (as they perform inversion function). The symbol of a logic NOT gate along with expression is shown in the following figure.
The output of the logic NOT symbol has a bubble (o) at the output which denotes an inversion of the signal and, therefore, is called an “Inversion Bubble”. The counterpart of an Inverter is a Buffer that does not invert the signal and performs just amplification of the signal.
Presentation of NOT Function using Switch
The logic NOT function can be illustrated with the help of the following diagram. In the figure, a lamp along with two switches is shown. The switches’ positions are inverse or complemented with respect to each other. The switch without bar or overline represents the logical input (X) and the switch with bar or overline is the inverted state of the input (X). The logical states of “0” & “1” represent a switch with “Open” & “Closed” positions, respectively.
When the input is TRUE or switch (X) is in the close state then its complement switch will be opened and the lamp will remain OFF whilst the input (X) is in ON state.
However, when input is FALSE or switch (X) is in the open state then its complement switch will be closed and the lamp will turn ON whilst the input (X) is in OFF state.
From the above scenarios, it is clear that the lamp state represents an inversion with the respect to the input (X).
Logic NOT Truth Table
The truth table of a logic NOT gate is shown below.
Boolean Algebra Laws
In the Boolean Algebra, the complementation law involves logic NOT function and is shown in the following figure where it performs the inversion function.
Construction of Other Logic Gates
The logic NAND and NOR gates can be constructed by placing the logic “NOT” gate at the output of logic “AND” and “OR” gates, respectively. The NAND and NOR gates are termed Universal Logic Gates as they can be used to make any other logic. Similarly, cascading two logic NOT gates reverts back to the original input signal and this arrangement makes a Digital Buffer.
Construction of Logic NOT Function
The logic NOT function is extensively used in digital circuits and is available in dedicated IC packages having multiple logic NOT gates. However, the logic NOT function can also be constructed using NAND or NOR gates as they are Universal Gates. The construction of logic NOT using NAND or NOR gates saves the space and cost of using separate logic NOT gate IC package. The following figure shows NOT function equivalents
Commercially Available Logic NOT Gates
The logic NOT gate is available in form of an I.C. package that contains multiple NOT gates. The I.C. packages come in both Transistor-Transistor Logic (TTL) and Complementary Metal Oxide Semiconductor (CMOS) families. A few commercially available logic NOT gates are given below:
- TTL 74LS04 He NOT Gates
- CMOS 4049 Hex NOT Gates
- CMOS 4069 Hex NOT Gates
- The logic NOT function inverts or complements the input signal. It outputs FALSE when input is TRUE and TRUE when input is FALSE.
- The logic NOT gate is also called an “Inverter” because of its inverter function.
- The logic NOT gate is used in the construction of Universal Logic gates such as NAND and NOR gates.
- The logic NOT function can be implemented in digital circuits using NAND or NOR gates which eliminates the use of a dedicated logic NOT gate IC package.
- The logic NOT gate is available in different TTL and CMOS IC packages.