NXP Ara240 Delivers 40 eTOPS for Generative AI and Edge Applications

NXP’s Ara240 is a 40-equivalent TOPS or eTOPS  NPU for running LLMs, vision-language models (VLMs), and computer vision workloads locally. The accelerator is designed for industrial automation, robotics, edge computing, smart cameras, and automotive applications where AI inference needs to run without relying on cloud processing.

The processor features eight programmable neural network processing cores, two vector processing units, and support for up to 16GB LPDDR4 memory. It also offers PCIe Gen4 x4 and USB 3.2 Gen1 host interfaces, secure boot, and hardware root-of-trust security. NXP provides an M.2 accelerator module and a software development kit for integrating the processor with existing embedded systems.

NXP Ara240 discrete neural processing unit (DNPU) delivering up to 40 eTOPS of AI performance

NXP Ara240 specifications:

• AI Accelerator:
  • Eight programmable Neural Network Processor (NNP) cores running at up to 900 MHz
  • Two Vector Processing Units (VPUs) based on RISC-V architecture
  • Management and Control Processor (MCP), I/O Control Processor (IOCP), and Secure Boot Processor (SBP)
  • Up to 40 equivalent TOPS (eTOPS) of AI performance
• Memory:
  • L1 memory and shared on-chip memory
  • 32-bit/64-bit LPDDR4 interface supporting up to 8GB/16GB memory
  • LPDDR4 data rates up to 4266 MT/s
• Host Interfaces:
  • PCIe Gen4 x1/x2/x4 (up to 16 GT/s per lane)
  • USB 3.2 Gen1 (5 Gbps), backward compatible with USB 2.0
• Peripheral Interfaces: GPIO, I2C (master), SPI, UART, JTAG
• Security: Secure boot, hardware root-of-trust processor
• Power Consumption: 6–8W typical, around 2W idle (chip-level figures)
• Operating Temperature (junction)
  • Commercial: 0°C to 85°C
  • Industrial: -40°C to 105°C
• Package: 17 x 17 mm, 625-ball FCBGA

The Ara240 uses a programmable architecture designed to support both conventional computer vision models and newer generative AI workloads. NXP lists models such as Llama 3 8B, Qwen 2.5-VL 3B, YOLOv8, and ResNet-50 among the supported use cases. The processor also includes dedicated on-chip memory and a high-bandwidth LPDDR4 interface to handle larger models without relying on the host processor’s memory.

On the software side, NXP provides the Ara Software Development Kit, which includes an AI compiler, model quantization tools, and dataflow optimization for deploying AI models on the accelerator. The SDK also supports the Hugging Face ecosystem through Optimum-Ara. The latest Ara SDK 3.0 and AraRT 3.0 releases add support for x86 Linux hosts and multi-chip model sharding, while NXP provides LLM Edge Studio, VLM Edge Studio, and computer vision examples for development.

To simplify the development process, the company also offers the Ara240 16GB M.2 Module, with an M.2 2280 M-Key form factor. The module includes 16GB LPDDR4 memory, 4MB SPI NOR flash, and an 8KB I2C EEPROM, with PCIe Gen4 x1, x2, and x4 configurations. It can be used as a companion AI accelerator with NXP’s i.MX 8M Plus and i.MX 95 application processors. Manufacturers such as Geniatech, Forlinx, Gateworks, and F&S also offer third-party M. 2 modules.

The Ara240 is available in commercial and industrial variants, but pricing has not been announced. NXP’s 16GB M.2 development module (ARA2-M2-16G-GT) is listed for $699 but is currently out of stock. More information, including datasheets and hardware documentation, can be found on the NXP product page.

Images used courtesy of NXP