Raltron Launches Low Phase Noise 100 MHz Voltage Controlled Crystal Oscillator

Raltron has released the VC8620D-D3-20-100.000-4-5, a 100 MHz sine-wave voltage controlled crystal oscillator (VCXO) designed for satellite payloads and ground stations, RF synthesizers, and test and measurement equipment. The device is engineered for systems where phase noise performance has a direct, measurable impact on link budgets, receiver dynamic range, and spectral purity.

Raltron’s new VC8620D-D3-20-100.000-4-5 is a 100 MHz sine-wave VCXO that offers low noise and high stability. Image used courtesy of Raltron

Low Phase Noise 100 MHz VCXOs

The single-sideband (SSB) phase noise figures in the datasheet paint a fairly complete picture of the spectral performance of Raltron’s new 100 MHz VCXO. At a 10 Hz offset, the phase noise is specified at -85 dBc/Hz, typical for a crystal-based oscillator at close offsets where flicker noise is the dominant factor. From there it improves steadily: -120 dBc/Hz at 100 Hz, -145 dBc/Hz at 1 kHz, and -168 dBc/Hz at 10 kHz. The noise floor plateaus at -175 dBc/Hz from 100 kHz to 20 MHz, which is the figure most relevant to broadband phase-locked loop (PLL) and synthesizer reference-chain budgets.

Spurious outputs are specified at -80 dBc with no sub-harmonics, while the second harmonic is suppressed to -25 dBc. In multi-band RF environments, particularly satellite transponders with tight channel spacing, these figures help keep spectral masks clean and reduce the likelihood of spurious mixing products landing in-band.

Performance Stability and Hardware Details

Raltron’s VCXO operates from a nominal 5.0 V supply with a ±10% tolerance and draws 30 mA to 45 mA. Output power is 5 dBm to 7 dBm into 50 Ω, which is sufficient to drive most mixer and PLL IC inputs without additional amplification stages in the signal chain. 

The voltage control input is centered at 2.5 V across a 0 V to 5.0 V range, with a tuning sensitivity of 25 ppm/V and a 100 kΩ input impedance. The guaranteed absolute pull range is ±20 ppm, maintained across the full operating temperature range, with a 10-year aging budget, ±5% supply variation, and 10% load variation, providing a useful combined worst-case figure for link budget planning.

The VCXO’s 14.3 mm × 9.0 mm SMD package is designed for high-density RF boards in rugged environments. Image used courtesy of Raltron

Temperature frequency stability is specified at ±20 ppm from -40°C to 55°C, with an operable range extending to 85°C. Aging is rated below 3 ppm in the first year and below 1 ppm annually thereafter, which is relevant for long-life ground-station infrastructure. Start-up time is 2 ms to 5 ms at room temperature.

The package is a 4-pad SMD form factor measuring 14.3 mm × 9.0 mm, with a maximum height of 5.6 mm, built on an FR5 substrate with a nickel-silver cover and gold-plated contacts. ESD withstand is 3 kV under the HBM test method, and the MSL rating is Level 1, meaning no special dry-pack handling or baking is required prior to reflow.

Target Use Cases and Design Impact

The VC8620D is a strong candidate wherever a 100 MHz reference is both spectrally clean and frequency-agile. Satellite ground station LO chains, high-order modulation RF transmitters, PLL synthesizer reference inputs, and precision test instruments are all natural fits, particularly where phase noise accumulation across a multi-stage signal chain needs to be tightly budgeted from the reference oscillator outward. 

The combination of a -175 dBc/Hz broadband noise floor, a well-specified pull range, and a compact SMD footprint also makes it applicable to telecom timing infrastructure and high-dynamic-range receiver front ends, where close-in and far-out noise both carry design consequences.