AMD Launches EPYC Embedded 2005 Zen 5 SoCs For Edge And Industrial Systems

Storagereview-AMD-EPYC-Embedded-2005

AMD has unveiled the EPYC Embedded 2005 Series, a mid-range processor family that additionally draws its foundation on AMD’s Zen 5 architecture. The following signifies an enormous rise in competition in the networking, storage, and industrial sectors, all of which are increasingly influenced by artificial intelligence. Each of the three Zen chips in the new line-up has a compact 40 x 40 mm ball grid array (BGA) design and scales from 8 to 16 cores. The range of thermal design power is 45W to 75W. The series concentrates on platforms that need to run continuously and provide long service lifetimes, with an emphasis on high compute density and performance.  

The new SoCs possess 28 lanes of PCIe Gen5 connectivity, support dual-channel DDR5-5600 memory with ECC, and up to 16 cores (32 threads) with a 64 MB L3 cache. Another benefit is that it supports multi-SPI ROM, BMC, PCIe Hot Plug, advanced Reliability, Availability, and Serviceability (RAS) capabilities, and AMD Infinity Guard security. With up to ten years of availability along with comprehensive open-source software support, the processors are built to run around the clock. It is appropriate for cold storage systems, networking switches and routers, robotics, aerospace, and other high-reliability embedded infrastructure owing to these features. 

EPYC Embedded 2005 Series Architecture

EPYC Embedded 2005 specifications:

• AMD EPYC Embedded 2400 Series processors based on the Zen 5 CPU architecture for embedded and edge systems
• Available SKUs:
  • EPYC Embedded 2435: 8 cores / 16 threads
  • EPYC Embedded 2655: 12 cores / 24 threads
  • EPYC Embedded 2875: 16 cores / 32 threads
• Die configuration varies by model: 1 or 2 CCDs plus a dedicated IO die
• Clock speeds up to 4.5GHz boost, with base clocks from 2.7GHz to 3.0GHz
• Cache sizes scale with core count, up to 16MB L2 cache and 64MB shared L3 cache
• Dual-channel DDR5 memory support:
  • DDR5-5600 with 1 DIMM per channel
  • DDR5-3600 with 2 DIMMs per channel
  • Sideband ECC supported
• USB connectivity:
  • 4× USB 3.2 Gen 2 (10Gbps)
  • 1× USB 2.0
• PCIe expansion with 28 lanes across 11 root ports, supporting SR-IOV and enhanced hot-plug
• Low-speed interfaces: GPIO, I²C, I³C, SMBus, SPI, and eSPI
• Integrated security processor with RAS (Reliability, Availability, and Serviceability) features
• Power envelope:
  • Nominal TDP from 45W to 75W, depending on SKU
  • Configurable TDP range starting at 45W
• FL1 lidless BGA package, 40 × 40mm, 1,763 balls, 0.81mm pitch
• Operating junction temperature up to 105°C, suitable for industrial environments

AMD EPYC Embedded 2005 Series Processor Product Table

A typical embedded software stack, such as EDK II firmware, Yocto-based Linux distributions, and upstream Linux kernel drivers, is supported by the EPYC Embedded 2005 Series.

The EPYC Embedded 2005 Series’ price has not been revealed by AMD. Partners are currently sampling the processors, and Q1 2026 is when mass production is expected to begin. The company’s press release and product page have more details.

Images used courtesy of AMD.