IBM Plans Early Nanostack PDK for 3D Transistor Chip Design

https://www.electronics-lab.com/news/ibm-plans-early-nanostack-pdk-for-3d-transistor-chip-design/

A research-stage kit due in the first quarter of 2027 lets fabless firms, tool vendors, and equipment makers test stacked n-type and p-type devices ahead of production.