Rambus Expands Client Chipsets for DDR5 and LPDDR5 AI PC Memory Modules

As AI workloads migrate from data centers to laptops and workstations, the memory subsystems that underpin these platforms face mounting pressure. Higher bandwidth, tighter power envelopes, and new form-factor constraints are forcing a re-evaluation of every layer of the memory stack, including how modules are powered. Rambus is addressing this with a newly completed client chipset portfolio that spans the full range of JEDEC-standard DDR5 and LPDDR5 client memory modules.

Two New PMICs Round Out the Client Portfolio

The centerpiece of the announcement is a pair of Power Management ICs tailored to distinct client use cases. The PMIC5200 targets LPDDR5 CAMM2 (LPCAMM2) modules, while the PMIC5120 serves DDR5 CUDIMM and CSODIMM configurations used in desktop PCs, notebooks, and workstations.

Both devices follow the same on-module power architecture philosophy introduced by DDR5: rather than routing low-voltage rails from the motherboard through a connector, a high-voltage bulk input is delivered to the module and regulated locally. This approach dramatically reduces resistive losses throughout the power delivery network, tightening voltage tolerances at the DRAM dies and enabling the performance headroom required by next-generation data rates.

The PMIC5200 accepts a VIN_Bulk input in the range of 3.0 V to 5.5 V and achieves peak DC/DC conversion efficiency of 88% or better—a meaningful figure given the power constraints of ultra-thin notebook platforms. It incorporates four step-down switching regulators and two LDOs, delivering the independently programmable voltage rails that LPDDR5 DRAM requires. The PMIC5120, aimed at the broader DDR5 client segment, achieves over 90% peak efficiency from a 5 V input and features three step-down switching regulators and two LDOs that generate 1.8 V and 1.0 V outputs. Its input voltage range of 4.25 V to 5.5 V accommodates the supply rails common to desktop and workstation platforms.

The DDR5 and LPDDR5 memory portfolio features new PMICs that utilize an on-module power architecture to regulate voltage locally. Image used courtesy of Rambus

Signal Integrity and Advanced Telemetry

Both PMICs share a comprehensive telemetry and diagnostic suite. Voltage, current, and temperature can be monitored with 31.25 mA/mW resolution, with persistent error log registers, parity error checking, and packet error-check functions. Multi-time programmable non-volatile memory retains configuration across power cycles, and I2C/I3C interfaces with In-band Interrupt support give system firmware fine-grained visibility into module health. These capabilities are particularly relevant in AI PC platforms, where sustained workloads can push memory subsystems closer to their thermal and electrical limits for longer periods than traditional consumer workloads do.

The PMIC5200 ships in a 5 mm × 5 mm FCQFN package, while the PMIC5120 occupies a more compact 3 mm × 4 mm footprint, a useful distinction when PCB area inside a slim notebook chassis is at a premium.

A Complete Chipset for Every JEDEC Client Module

Together with the previously available Client Clock Driver (CKD7200) and SPD Hub (SPD1605G), the two new PMICs allow Rambus to offer fully integrated chipsets for every JEDEC-defined DDR5 and LPDDR5 client module type. The LPCAMM2 chipset pairs the PMIC5200 with the SPD Hub, while the DDR5 CUDIMM and CSODIMM chipset combines the PMIC5120, CKD7200, and SPD Hub. Both chipsets comply with their respective JEDEC standards—JESD301-3 for the LPCAMM2 PMIC and JESD301-6 for the DDR5 client PMIC.

LPCAMM2 is a particularly notable development for notebook engineers. Because LPDDR has historically been soldered directly to the motherboard to maintain signal integrity, memory configurations have been fixed at the time of manufacture. LPCAMM2 preserves LPDDR’s performance and power characteristics while introducing the modularity of a detachable form factor, enabling memory upgrades and repairs that were previously impractical in thin-and-light designs.

Applications and Outlook

For electrical engineers working on AI PC platform designs—whether that means a slim consumer ultrabook, a content-creation workstation, or a commercial desktop—Rambus’s expanded client chipset portfolio offers a well-characterized, JEDEC-compliant solution stack. The combination of on-module power management, high telemetry resolution, and compact packaging makes these chipsets worth a close look for any design where memory bandwidth, power efficiency, and thermal headroom all need to move in the right direction at once.