GigaDevice Unveils Motor Control MCU and Expands 1.2 V SPI NOR Flash to 256 Mb
The new GD32M531 series MCU is purpose-built for motor control applications, while the expanded GD25UF series 1.2 V SPI NOR Flash targets advanced AI computing.
At Embedded World 2026, GigaDevice Semiconductor announced a new pair of products: the GD32M531 series MCU aimed squarely at motor control applications, and an expanded density range for its GD25UF 1.2 V SPI NOR Flash family.
A look at the GD32M531 series 32-bit MCUs, designed for motor control applications. Video used courtesy of GigaDevice Semiconductor
GD32M531: An MCU Built Around Motor Control
The GD32M531 series 32-bit MCU is built on an Arm Cortex-M33 core running at up to 180 MHz, with DSP extensions and a floating-point unit. It scores up to 705 CoreMark and 267 DMIPS, and ships with 256 KB of Flash, 64 KB of Data-Flash, and 32 KB of SRAM — all with ECC coverage. The device supports a supply voltage range of 2.7 V to 5.5 V and is rated from -40°C to 105°C, with a junction temperature limit of 125°C.
The peripheral set covers four UARTs, one I2C, one SPI, one CAN 2.0B interface, two ADC modules with independent sample-and-hold circuits, and a DAC. Three dedicated CP-Timers and four GP-Timers are included for control tasks. A one-line single-wire debug interface is supported for development and production testing. The device is available in LQFP64 and LQFP48 packages.

Block diagram of the GD32M531 MCU. Image used courtesy of GigaDevice Semiconductor
Hardware Acceleration for Field-Oriented Control (FOC) Applications
The distinguishing feature of the GD32M531 is its built-in hardware support for field-oriented control. Dedicated accelerators handle trigonometric functions and SVPWM generation, reducing the CPU cycles required for FOC algorithms. Two enhanced AD-Timers support independent dual-motor FOC drive, and hardware phase-shifted ADC trigger linkage enables synchronous current and voltage sampling without software delays.
Overcurrent protection is handled by an integrated POC>OC block that responds at the microsecond level without requiring CPU intervention. The device’s STL is IEC 60730 Class B certified, making it suitable for home appliance safety requirements. ESD performance is rated at HBM ±4kV and CDM ±1kV, with latch-up resistance up to ±200mA at 125°C.
Target applications include outdoor air conditioner units, heat pumps, washing machines, dishwashers, multi-burner induction cookers, industrial inverters, and photovoltaic MPPT inverter systems. Samples and development boards are available now, with mass production scheduled for April 2026.

GigaDevice’s GD25UF series 1.2 V ultra-low-power SPI NOR Flash is now available in capacities from 8 Mb to 256 Mb. Image used courtesy of GigaDevice Semiconductor
GD25UF: 1.2 V SPI NOR Flash from 8 Mb to 256 Mb
The GD25UF series is a family of 1.2 V SPI NOR Flash devices now spanning densities from 8 Mb to 256 Mb. The devices operate between 1.14 V and 1.26 V, aligning with the supply voltages used by many current-generation SoCs and eliminating the need for external level shifters.
The series supports Single, Dual, Quad, and DTR Quad SPI modes, with a maximum clock frequency of 120 MHz in STR mode and 80 MHz in DTR mode. Peak data throughput reaches 80 MB/s. Compared to 1.8 V Flash, the lower operating voltage translates to a 50–70% reduction in power consumption, which is meaningful for battery-powered wearables, hearables, and medical devices.
At the high end, the 256 Mb density targets AI inference platforms, CXL memory interconnects, and fiber-optic transceivers. At the low end, 8 Mb devices are available in WLCSP packaging for space-constrained IoT and wearable designs. The series is rated for 100,000 program/erase cycles and 20-year data retention, with temperature range options up to -40°C to 125°C for industrial and automotive use.
The full GD25UF series is in mass production across SOP8, WSON8, USON8, and WLCSP packages. Samples and technical support are available through GigaDevice’s sales team and authorized distributors.