STMicro’s Teseo VI Family of GNSS Receivers

The STMicro TeseoVI is a cutting-edge GNSS receiver IC and module family, providing ASIL-compliant single-chip solutions for sub-centimeter accuracy positioning. It supports simultaneous multi-constellation and multi-band operations, a Phase Change Memory (PCM) technology, and a single configurable firmware binary, also supports Arm Cortex-M7 CPU.

The Teseo VI family includes three standalone ICs

• STA8600A is a Quad-band GNSS receiver with a measurement engine and standard point positioning cores.
• STA8610A is a Quad-band GNSS receiver with precise point positioning (PPP) and real-time kinematic positioning (RTK).
• STA9200MA is a Single-die, multi-band receiver with special embedded firmware for ASIL-B applications.

Features and Interface

• Processor
  • STA8600A:
    • Arm Cortex-M7 (dual-core)
  • STA8610A:
    • Measurement engine core: Arm Cortex-M7 CPU
    • Positioning engine core: RTK/PPP
  • STA9200MA
    • Arm Cortex-M7 (dual lockstep cores)
    • Embedded cache (16 KB + 16 KB)
    • Embedded 512 KB RAM
• Memory
  • STA8610A:
    • Optional extended 4MB RAM
    • Octo-SPI memory interface (Quad/octal flash/RAM controller, HyperBus flash/RAM controller)
• Peripheral Interrface
  • 2x UART ports with hardware flow control (3x UART for STA8610A)
  • SSP, I2C, SPIQ
  • 2x PPS configurable output (1x for STA9200MA)
• Security
  • Cybersecurity (ISO21434) support
  • Embedded hardware security module (HSM)
  • Anti-jamming/anti-spoofing
• Power Supply
  • Backup domain: 1.71 V to 3.63 V
  • Switchable domain: 1.71 V to 3.63 V
  • Optional external core supply voltage: 0.9 V to 1.0 V
  • On-chip LDOs with high-voltage/low-voltage monitors
• Dimensions
  • STA8600A and STA9200MA – VFQFPN56 (7 x 7 x 0.9 mm) with settable flanks
  • STA8610A – LFBGA100 (8.5 x 8.5 x 1.4 mm) 0.8 mm ball pitch
• Temperature
  • Automotive grade upto 105°C

Specifications of Teseo VI

The Teseo VI family, including ASIL-compliance for ensured safety and reliability in automotive and industrial applications. It achieves sub-centimeter accuracy, makes precise positioning for applications like autonomous driving and robotics. The integration of Phase Change Memory (PCM) technology eliminates the need for external memory, reducing supply chain constraints and BOM costs. Additionally, a single configurable firmware binary simplifies firmware management and reduces costs.

The Teseo VI family features a range of cores, including the STA8600A with dual-core Arm Cortex-M7, the STA8610A with a measurement engine core and positioning engine core, and the STA9200MA with dual lockstep cores. The devices also include embedded cache, RAM, and optional extended RAM. Interfaces like UART, SSP, I2C, SPI, and PPS configurable output, as well as analog features like dedicated ADC for antenna sensing. Additional features include timers, debugging tools, and security measures such as cybersecurity support, embedded hardware security modules, and anti-jamming/anti-spoofing. The devices are available in various packages, including VFQFPN56 and LFBGA100, and operate within temperature range of up to 105°C.

Software Support of the TeseoVI family

The TeseoVI family is supported by several software tools like the TESEO-SUITE which is a software suite for managing and configuring the TeseoVI family and TESEO-DRAW is Dead reckoning firmware for Teseo VI GNSS ICs and modules. Also for precise positioning and navigation for autonomous vehicles, they have Autonomous driving. The TeseoVI provides accurate positioning and navigation for robotics applications. Additionally it has precise tracking and can locate the location of assets in various industries.

The STA8610A (Teseo-ELE6A) and STA8600A (Teseo-VIC6A) evaluation boards are designed for rapid configuration and performance analysis of TeseoVI GNSS applications. The cost of TeseoVI family is not available at this moment but they are available for sampling on the ST’s website.